Searched refs:JZ4760_CLK_PLL0 (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/clk/ingenic/ |
| H A D | jz4760-cgu.c | 92 [JZ4760_CLK_PLL0] = {
149 .parents = { JZ4760_CLK_PLL0, },
157 .parents = { JZ4760_CLK_PLL0, },
165 .parents = { JZ4760_CLK_PLL0, },
173 .parents = { JZ4760_CLK_PLL0, },
186 .parents = { JZ4760_CLK_PLL0, },
194 .parents = { JZ4760_CLK_PLL0, },
205 .parents = { JZ4760_CLK_PLL0 },
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| /linux/include/dt-bindings/clock/ |
| H A D | ingenic,jz4760-cgu.h | 11 #define JZ4760_CLK_PLL0 2 macro
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