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Searched refs:JH7110_STGCLK_STG_AXIAHB (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/clk/starfive/
H A Dclk-starfive-jh7110-stg.c20 #define JH7110_STGCLK_STG_AXIAHB (JH7110_STGCLK_END + 2) macro
35 JH71X0_GATE(JH7110_STGCLK_USB0_AXI, "usb0_axi", 0, JH7110_STGCLK_STG_AXIAHB),
42 JH7110_STGCLK_STG_AXIAHB),
44 JH71X0_GATE(JH7110_STGCLK_PCIE0_TL, "pcie0_tl", 0, JH7110_STGCLK_STG_AXIAHB),
46 JH7110_STGCLK_STG_AXIAHB),
48 JH71X0_GATE(JH7110_STGCLK_PCIE1_TL, "pcie1_tl", 0, JH7110_STGCLK_STG_AXIAHB),
50 JH7110_STGCLK_STG_AXIAHB),
52 JH71X0_GATE(JH7110_STGCLK_SEC_AHB, "sec_ahb", 0, JH7110_STGCLK_STG_AXIAHB),
53 JH71X0_GATE(JH7110_STGCLK_SEC_MISC_AHB, "sec_misc_ahb", 0, JH7110_STGCLK_STG_AXIAHB),
60 JH7110_STGCLK_STG_AXIAHB),
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