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Searched refs:InterlaceEnable (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_structs.h112 unsigned int InterlaceEnable; member
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.h670 unsigned int InterlaceEnable,
H A Ddisplay_mode_vba_32.c441 v->dummy_vars.DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.SurfaceParameters[k].InterlaceEnable = mode_lib->vba.Interlace[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
778 v->dummy_vars.DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.myPipe.InterlaceEnable = mode_lib->vba.Interlace[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2745 v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.SurfParameters[k].InterlaceEnable = mode_lib->vba.Interlace[k]; in dml32_ModeSupportAndSystemConfigurationFull()
3294 v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.myPipe.InterlaceEnable = mode_lib->vba.Interlace[k]; in dml32_ModeSupportAndSystemConfigurationFull()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_shared_types.h123 unsigned int InterlaceEnable;
122 unsigned int InterlaceEnable; global() member
H A Ddml2_core_dcn4_calcs.c2979 p->myPipe[k].InterlaceEnable, in CalculateVMRowAndSwath()
3057 p->myPipe[k].InterlaceEnable, in CalculateVMRowAndSwath()
4864 unsigned int InterlaceEnable, in CalculateVUpdateAndDynamicMetadataParameters()
4890 if (InterlaceEnable == 1 && ProgressiveToInterlaceUnitInOPP == false) { in get_urgent_bandwidth_required()
5231 p->myPipe->InterlaceEnable, in CalculatePrefetchSchedule()
5312 if (p->OutputFormat == dml2_420 || (p->myPipe->InterlaceEnable && p->myPipe->ProgressiveToInterlaceUnitInOPP)) in CalculatePrefetchSchedule()
7499 myPipe->InterlaceEnable = display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.interlaced; in dml_core_ms_prefetch_check()
8979 s->SurfParameters[k].InterlaceEnable = display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.interlaced; in dml_core_mode_support()
10772 s->SurfaceParameters[k].InterlaceEnable = display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.interlaced; in dml_core_mode_programming()
11288 myPipe->InterlaceEnable in dml_core_mode_programming()
4837 CalculateVUpdateAndDynamicMetadataParameters(unsigned int MaxInterDCNTileRepeaters,double Dppclk,double Dispclk,double DCFClkDeepSleep,double PixelClock,unsigned int HTotal,unsigned int VBlank,unsigned int DynamicMetadataTransmittedBytes,unsigned int DynamicMetadataLinesBeforeActiveRequired,unsigned int InterlaceEnable,bool ProgressiveToInterlaceUnitInOPP,double * TSetup,double * Tdmbf,double * Tdmec,double * Tdmsks,unsigned int * VUpdateOffsetPix,unsigned int * VUpdateWidthPix,unsigned int * VReadyOffsetPix) CalculateVUpdateAndDynamicMetadataParameters() argument
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/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddisplay_mode_core.c364 dml_uint_t InterlaceEnable,
1067 p->myPipe->InterlaceEnable, in CalculatePrefetchSchedule()
1141 if (p->OutputFormat == dml_420 || (p->myPipe->InterlaceEnable && p->myPipe->ProgressiveToInterlaceUnitInOPP)) in CalculatePrefetchSchedule()
1865 dml_uint_t InterlaceEnable, in CalculateVUpdateAndDynamicMetadataParameters()
1891 if (InterlaceEnable == 1 && ProgressiveToInterlaceUnitInOPP == false) { in CalculateVUpdateAndDynamicMetadataParameters()
5180 p->myPipe[k].InterlaceEnable, in CalculateVMRowAndSwath()
5253 p->myPipe[k].InterlaceEnable, in CalculateVMRowAndSwath()
6485 myPipe->InterlaceEnable = mode_lib->ms.cache_display_cfg.timing.Interlace[k]; in dml_prefetch_check()
7839 s->SurfParameters[k].InterlaceEnable = mode_lib->ms.cache_display_cfg.timing.Interlace[k]; in dml_core_mode_support()
8789 s->SurfaceParameters[k].InterlaceEnable in dml_core_mode_programming()
1863 CalculateVUpdateAndDynamicMetadataParameters(dml_uint_t MaxInterDCNTileRepeaters,dml_float_t Dppclk,dml_float_t Dispclk,dml_float_t DCFClkDeepSleep,dml_float_t PixelClock,dml_uint_t HTotal,dml_uint_t VBlank,dml_uint_t DynamicMetadataTransmittedBytes,dml_uint_t DynamicMetadataLinesBeforeActiveRequired,dml_uint_t InterlaceEnable,dml_bool_t ProgressiveToInterlaceUnitInOPP,dml_float_t * TSetup,dml_float_t * Tdmbf,dml_float_t * Tdmec,dml_float_t * Tdmsks,dml_uint_t * VUpdateOffsetPix,dml_uint_t * VUpdateWidthPix,dml_uint_t * VReadyOffsetPix) CalculateVUpdateAndDynamicMetadataParameters() argument
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H A Ddisplay_mode_core_structs.h464 dml_uint_t InterlaceEnable; member