| /linux/drivers/pinctrl/renesas/ |
| H A D | pfc-r8a77970.c | 109 #define GPSR2_7 F_(VI0_DATA3, IP3_27_24)
193 #define IP3_27_24 FM(VI0_DATA3) FM(HSCK1) FM(SCL3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, … macro
274 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
519 PINMUX_IPSR_GPSR(IP3_27_24, VI0_DATA3),
520 PINMUX_IPSR_GPSR(IP3_27_24, HSCK1),
521 PINMUX_IPSR_MSEL(IP3_27_24, SCL3_A, SEL_I2C3_0),
2263 IP3_27_24
|
| H A D | pfc-r8a77995.c | 65 #define GPSR1_23 F_(DU_DR7, IP3_27_24)
240 #define IP3_27_24 FM(DU_DR7) FM(LCDOUT23) FM(TCLK1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0,… macro
366 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
653 PINMUX_IPSR_GPSR(IP3_27_24, DU_DR7),
654 PINMUX_IPSR_GPSR(IP3_27_24, LCDOUT23),
655 PINMUX_IPSR_MSEL(IP3_27_24, TCLK1_B, SEL_TMU_1_1),
2704 IP3_27_24
|
| H A D | pfc-r8a77980.c | 124 #define GPSR2_7 F_(VI0_DATA3, IP3_27_24)
227 #define IP3_27_24 FM(VI0_DATA3) FM(HSCK1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)… macro
324 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
602 PINMUX_IPSR_GPSR(IP3_27_24, VI0_DATA3),
603 PINMUX_IPSR_GPSR(IP3_27_24, HSCK1),
2717 IP3_27_24
|
| H A D | pfc-r8a77990.c | 103 #define GPSR1_7 F_(A7, IP3_27_24)
244 #define IP3_27_24 FM(A7) FM(TX4_A) FM(MSIOF3_TXD_B) FM(VI4_DATA11) F_(0, 0) F_(0, 0) FM(RIF2_D… macro
392 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
715 PINMUX_IPSR_GPSR(IP3_27_24, A7),
716 PINMUX_IPSR_GPSR(IP3_27_24, TX4_A),
717 PINMUX_IPSR_GPSR(IP3_27_24, MSIOF3_TXD_B),
718 PINMUX_IPSR_GPSR(IP3_27_24, VI4_DATA11),
719 PINMUX_IPSR_MSEL(IP3_27_24, RIF2_D1_B, SEL_DRIF2_1),
4820 IP3_27_24
|
| H A D | pfc-r8a77965.c | 117 #define GPSR1_15 F_(A15, IP3_27_24)
290 #define IP3_27_24 FM(A15) FM(LCDOUT15) FM(MSIOF3_TXD_C) F_(0, 0) FM(HRTS4_N) FM(VI5_DATA11) FM(… macro
455 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
850 PINMUX_IPSR_GPSR(IP3_27_24, A15),
851 PINMUX_IPSR_GPSR(IP3_27_24, LCDOUT15),
852 PINMUX_IPSR_MSEL(IP3_27_24, MSIOF3_TXD_C, SEL_MSIOF3_2),
853 PINMUX_IPSR_GPSR(IP3_27_24, HRTS4_N),
854 PINMUX_IPSR_GPSR(IP3_27_24, VI5_DATA11),
855 PINMUX_IPSR_GPSR(IP3_27_24, DU_DG7),
5574 IP3_27_24
|
| H A D | pfc-r8a77951.c | 112 #define GPSR1_15 F_(A15, IP3_27_24)
285 #define IP3_27_24 FM(A15) FM(LCDOUT15) FM(MSIOF3_TXD_C) F_(0, 0) FM(HRTS4_N) FM(VI5_DATA11) FM(… macro
450 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
844 PINMUX_IPSR_GPSR(IP3_27_24, A15),
845 PINMUX_IPSR_GPSR(IP3_27_24, LCDOUT15),
846 PINMUX_IPSR_MSEL(IP3_27_24, MSIOF3_TXD_C, SEL_MSIOF3_2),
847 PINMUX_IPSR_GPSR(IP3_27_24, HRTS4_N),
848 PINMUX_IPSR_GPSR(IP3_27_24, VI5_DATA11),
849 PINMUX_IPSR_GPSR(IP3_27_24, DU_DG7),
5378 IP3_27_24
|
| H A D | pfc-r8a7796.c | 117 #define GPSR1_15 F_(A15, IP3_27_24)
290 #define IP3_27_24 FM(A15) FM(LCDOUT15) FM(MSIOF3_TXD_C) F_(0, 0) FM(HRTS4_N) FM(VI5_DATA11) FM(… macro
455 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
848 PINMUX_IPSR_GPSR(IP3_27_24, A15),
849 PINMUX_IPSR_GPSR(IP3_27_24, LCDOUT15),
850 PINMUX_IPSR_MSEL(IP3_27_24, MSIOF3_TXD_C, SEL_MSIOF3_2),
851 PINMUX_IPSR_GPSR(IP3_27_24, HRTS4_N),
852 PINMUX_IPSR_GPSR(IP3_27_24, VI5_DATA11),
853 PINMUX_IPSR_GPSR(IP3_27_24, DU_DG7),
5333 IP3_27_24
|
| H A D | pfc-r8a77470.c | 667 PINMUX_IPSR_GPSR(IP3_27_24, QSPI0_IO3),
668 PINMUX_IPSR_GPSR(IP3_27_24, RD_N),
|