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Searched refs:IP2_3_0 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c51 #define GPSR0_16 F_(DU_DB6, IP2_3_0)
179 #define IP2_3_0 FM(DU_DB6) F_(0, 0) F_(0, 0) FM(A16) FM(FXR_TXENB_N) F_(0, 0) F_(0, 0) F_(0, … macro
268 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
459 PINMUX_IPSR_GPSR(IP2_3_0, DU_DB6),
460 PINMUX_IPSR_GPSR(IP2_3_0, A16),
461 PINMUX_IPSR_GPSR(IP2_3_0, FXR_TXENB_N),
2259 IP2_3_0 ))
H A Dpfc-r8a77980.c53 #define GPSR0_16 F_(DU_DB6, IP2_3_0)
213 #define IP2_3_0 FM(DU_DB6) FM(MSIOF3_RXD) F_(0, 0) FM(A16) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… macro
318 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
539 PINMUX_IPSR_GPSR(IP2_3_0, DU_DB6),
540 PINMUX_IPSR_GPSR(IP2_3_0, MSIOF3_RXD),
541 PINMUX_IPSR_GPSR(IP2_3_0, A16),
2713 IP2_3_0 ))
H A Dpfc-r8a7779.c792 PINMUX_IPSR_MSEL(IP2_3_0, HRX0, SEL_HSCIF0_0),
793 PINMUX_IPSR_MSEL(IP2_3_0, RX1, SEL_SCIF1_0),
794 PINMUX_IPSR_GPSR(IP2_3_0, SCKZ),
795 PINMUX_IPSR_MSEL(IP2_3_0, RTS0_C_TANS_C, SEL_SCIF0_2),
796 PINMUX_IPSR_GPSR(IP2_3_0, SUB_TDI),
797 PINMUX_IPSR_GPSR(IP2_3_0, CC5_STATE3),
798 PINMUX_IPSR_GPSR(IP2_3_0, CC5_STATE11),
799 PINMUX_IPSR_GPSR(IP2_3_0, CC5_STATE19),
800 PINMUX_IPSR_GPSR(IP2_3_0, CC5_STATE27),
801 PINMUX_IPSR_GPSR(IP2_3_0, CC5_STATE35),
H A Dpfc-r8a77995.c79 #define GPSR1_9 F_(DU_DG1, IP2_3_0)
226 #define IP2_3_0 FM(DU_DG1) FM(LCDOUT9) FM(MSIOF3_SYNC_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… macro
360 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
597 PINMUX_IPSR_GPSR(IP2_3_0, DU_DG1),
598 PINMUX_IPSR_GPSR(IP2_3_0, LCDOUT9),
599 PINMUX_IPSR_MSEL(IP2_3_0, MSIOF3_SYNC_B, SEL_MSIOF3_1),
2700 IP2_3_0 ))
H A Dpfc-r8a77965.c131 #define GPSR1_1 F_(A1, IP2_3_0)
274 #define IP2_3_0 FM(A1) FM(LCDOUT17) FM(MSIOF3_TXD_B) F_(0, 0) FM(VI4_DATA9) F_(0, 0) FM(DU_DB1… macro
449 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
748 PINMUX_IPSR_GPSR(IP2_3_0, A1),
749 PINMUX_IPSR_GPSR(IP2_3_0, LCDOUT17),
750 PINMUX_IPSR_MSEL(IP2_3_0, MSIOF3_TXD_B, SEL_MSIOF3_1),
751 PINMUX_IPSR_GPSR(IP2_3_0, VI4_DATA9),
752 PINMUX_IPSR_GPSR(IP2_3_0, DU_DB1),
753 PINMUX_IPSR_MSEL(IP2_3_0, PWM4_A, SEL_PWM4_0),
5570 IP2_3_0 ))
H A Dpfc-r8a77951.c126 #define GPSR1_1 F_(A1, IP2_3_0)
269 #define IP2_3_0 FM(A1) FM(LCDOUT17) FM(MSIOF3_TXD_B) F_(0, 0) FM(VI4_DATA9) F_(0, 0) FM(DU_DB1… macro
444 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
742 PINMUX_IPSR_GPSR(IP2_3_0, A1),
743 PINMUX_IPSR_GPSR(IP2_3_0, LCDOUT17),
744 PINMUX_IPSR_MSEL(IP2_3_0, MSIOF3_TXD_B, SEL_MSIOF3_1),
745 PINMUX_IPSR_GPSR(IP2_3_0, VI4_DATA9),
746 PINMUX_IPSR_GPSR(IP2_3_0, DU_DB1),
747 PINMUX_IPSR_MSEL(IP2_3_0, PWM4_A, SEL_PWM4_0),
5374 IP2_3_0 ))
H A Dpfc-r8a7796.c131 #define GPSR1_1 F_(A1, IP2_3_0)
274 #define IP2_3_0 FM(A1) FM(LCDOUT17) FM(MSIOF3_TXD_B) F_(0, 0) FM(VI4_DATA9) F_(0, 0) FM(DU_DB1… macro
449 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
746 PINMUX_IPSR_GPSR(IP2_3_0, A1),
747 PINMUX_IPSR_GPSR(IP2_3_0, LCDOUT17),
748 PINMUX_IPSR_MSEL(IP2_3_0, MSIOF3_TXD_B, SEL_MSIOF3_1),
749 PINMUX_IPSR_GPSR(IP2_3_0, VI4_DATA9),
750 PINMUX_IPSR_GPSR(IP2_3_0, DU_DB1),
751 PINMUX_IPSR_MSEL(IP2_3_0, PWM4_A, SEL_PWM4_0),
5329 IP2_3_0 ))
H A Dpfc-r8a77470.c615 PINMUX_IPSR_GPSR(IP2_3_0, D6),
616 PINMUX_IPSR_GPSR(IP2_3_0, HTX2),
617 PINMUX_IPSR_MSEL(IP2_3_0, SDA1_B, SEL_I2C01_1),
618 PINMUX_IPSR_GPSR(IP2_3_0, PWM4_C),
H A Dpfc-r8a77990.c118 #define GPSR2_20 F_(AVB_TXCREFCLK, IP2_3_0)
230 #define IP2_3_0 FM(AVB_TXCREFCLK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, … macro
386 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
618 PINMUX_IPSR_GPSR(IP2_3_0, AVB_TXCREFCLK),
4816 IP2_3_0 ))