IP2_31_28 (reference) in projects: linux

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Searched refs:IP2_31_28 (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/pinctrl/renesas/
H A D	pfc-r8a77970.c	`116 #define GPSR2_0 F_(VI0_CLK, IP2_31_28) 186 #define IP2_31_28 FM(VI0_CLK) FM(MSIOF2_SCK) FM(SCK3) F_(0, 0) FM(HSCK3) F_(0, 0) F_(0, 0) F_(0… macro 275 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 483 PINMUX_IPSR_GPSR(IP2_31_28, VI0_CLK), 484 PINMUX_IPSR_GPSR(IP2_31_28, MSIOF2_SCK), 485 PINMUX_IPSR_GPSR(IP2_31_28, SCK3), 486 PINMUX_IPSR_GPSR(IP2_31_28, HSCK3), 2252 IP2_31_28`
H A D	pfc-r8a77980.c	`131 #define GPSR2_0 F_(VI0_CLK, IP2_31_28) 220 #define IP2_31_28 FM(VI0_CLK) FM(MSIOF2_SCK) FM(SCK3) F_(0, 0) FM(HSCK3) F_(0, 0) F_(0, 0) F_(0… macro 325 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 567 PINMUX_IPSR_GPSR(IP2_31_28, VI0_CLK), 568 PINMUX_IPSR_GPSR(IP2_31_28, MSIOF2_SCK), 569 PINMUX_IPSR_GPSR(IP2_31_28, SCK3), 570 PINMUX_IPSR_GPSR(IP2_31_28, HSCK3), 2706 IP2_31_28`
H A D	pfc-r8a77990.c	110 #define GPSR1_0 F_(A0, IP2_31_28) 237 #define IP2_31_28 FM(A0) FM(IRQ0) FM(PWM2_A) FM(MSIOF3_SS1_B) FM(VI5_CLK_A) FM(DU_CDE) FM(HRX3… macro 393 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 654 PINMUX_IPSR_GPSR(IP2_31_28, A0), 655 PINMUX_IPSR_GPSR(IP2_31_28, IRQ0), 656 PINMUX_IPSR_MSEL(IP2_31_28, PWM2_A, SEL_PWM2_0), 657 PINMUX_IPSR_MSEL(IP2_31_28, MSIOF3_SS1_B, SEL_MSIOF3_1), 658 PINMUX_IPSR_MSEL(IP2_31_28, VI5_CLK_A, SEL_VIN5_0), 659 PINMUX_IPSR_GPSR(IP2_31_28, DU_CDE), 660 PINMUX_IPSR_MSEL(IP2_31_28, HRX3_D, SEL_HSCIF3_3), [all …]
H A D	pfc-r8a77995.c	`72 #define GPSR1_16 F_(DU_DR0, IP2_31_28) 233 #define IP2_31_28 FM(DU_DR0) FM(LCDOUT16) FM(RX4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… macro 367 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 624 PINMUX_IPSR_GPSR(IP2_31_28, DU_DR0), 625 PINMUX_IPSR_GPSR(IP2_31_28, LCDOUT16), 626 PINMUX_IPSR_MSEL(IP2_31_28, RX4_B, SEL_SCIF4_1), 2693 IP2_31_28`
H A D	pfc-r8a77965.c	124 #define GPSR1_8 F_(A8, IP2_31_28) 281 #define IP2_31_28 FM(A8) FM(RX3_B) FM(MSIOF2_SYNC_A) FM(HRX4_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(… macro 456 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 800 PINMUX_IPSR_GPSR(IP2_31_28, A8), 801 PINMUX_IPSR_MSEL(IP2_31_28, RX3_B, SEL_SCIF3_1), 802 PINMUX_IPSR_MSEL(IP2_31_28, MSIOF2_SYNC_A, SEL_MSIOF2_0), 803 PINMUX_IPSR_MSEL(IP2_31_28, HRX4_B, SEL_HSCIF4_1), 804 PINMUX_IPSR_MSEL(IP2_31_28, SDA6_A, SEL_I2C6_0), 805 PINMUX_IPSR_MSEL(IP2_31_28, AVB_AVTP_MATCH_B, SEL_ETHERAVB_1), 806 PINMUX_IPSR_MSEL(IP2_31_28, PWM1_B, SEL_PWM1_1), [all …]
H A D	pfc-r8a77951.c	119 #define GPSR1_8 F_(A8, IP2_31_28) 278 #define IP2_31_28 FM(A8) FM(RX3_B) FM(MSIOF2_SYNC_A) FM(HRX4_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(… macro 451 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 794 PINMUX_IPSR_GPSR(IP2_31_28, A8), 795 PINMUX_IPSR_MSEL(IP2_31_28, RX3_B, SEL_SCIF3_1), 796 PINMUX_IPSR_MSEL(IP2_31_28, MSIOF2_SYNC_A, SEL_MSIOF2_0), 797 PINMUX_IPSR_MSEL(IP2_31_28, HRX4_B, SEL_HSCIF4_1), 798 PINMUX_IPSR_MSEL(IP2_31_28, SDA6_A, SEL_I2C6_0), 799 PINMUX_IPSR_MSEL(IP2_31_28, AVB_AVTP_MATCH_B, SEL_ETHERAVB_1), 800 PINMUX_IPSR_MSEL(IP2_31_28, PWM1_B, SEL_PWM1_1), [all …]
H A D	pfc-r8a7796.c	124 #define GPSR1_8 F_(A8, IP2_31_28) 281 #define IP2_31_28 FM(A8) FM(RX3_B) FM(MSIOF2_SYNC_A) FM(HRX4_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(… macro 456 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 798 PINMUX_IPSR_GPSR(IP2_31_28, A8), 799 PINMUX_IPSR_MSEL(IP2_31_28, RX3_B, SEL_SCIF3_1), 800 PINMUX_IPSR_MSEL(IP2_31_28, MSIOF2_SYNC_A, SEL_MSIOF2_0), 801 PINMUX_IPSR_MSEL(IP2_31_28, HRX4_B, SEL_HSCIF4_1), 802 PINMUX_IPSR_MSEL(IP2_31_28, SDA6_A, SEL_I2C6_0), 803 PINMUX_IPSR_MSEL(IP2_31_28, AVB_AVTP_MATCH_B, SEL_ETHERAVB_1), 804 PINMUX_IPSR_MSEL(IP2_31_28, PWM1_B, SEL_PWM1_1), [all …]
H A D	pfc-r8a77470.c	`643 PINMUX_IPSR_GPSR(IP2_31_28, D13), 644 PINMUX_IPSR_MSEL(IP2_31_28, MSIOF2_SYNC_A, SEL_MSIOF2_0), 645 PINMUX_IPSR_MSEL(IP2_31_28, RX4_C, SEL_SCIF4_2),`