| /linux/drivers/pinctrl/renesas/ |
| H A D | pfc-r8a77970.c | 61 #define GPSR0_6 F_(DU_DG2, IP0_27_24)
169 #define IP0_27_24 FM(DU_DG2) FM(MSIOF3_SS1) F_(0, 0) FM(A6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… macro
274 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
416 PINMUX_IPSR_GPSR(IP0_27_24, DU_DG2),
417 PINMUX_IPSR_GPSR(IP0_27_24, MSIOF3_SS1),
418 PINMUX_IPSR_GPSR(IP0_27_24, A6),
2233 IP0_27_24
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| H A D | pfc-r8a77995.c | 46 #define GPSR0_8 F_(MLB_SIG, IP0_27_24)
216 #define IP0_27_24 FM(MLB_SIG) FM(MSIOF2_SS2) FM(TX5_A) FM(SDA3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_… macro
366 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
554 PINMUX_IPSR_GPSR(IP0_27_24, MLB_SIG),
555 PINMUX_IPSR_GPSR(IP0_27_24, MSIOF2_SS2),
556 PINMUX_IPSR_MSEL(IP0_27_24, TX5_A, SEL_SCIF5_0),
557 PINMUX_IPSR_MSEL(IP0_27_24, SDA3_B, SEL_I2C3_1),
2674 IP0_27_24
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| H A D | pfc-r8a77980.c | 63 #define GPSR0_6 F_(DU_DG2, IP0_27_24)
203 #define IP0_27_24 FM(DU_DG2) F_(0, 0) FM(GETHER_RMII_TXD1) FM(A6) F_(0, 0) F_(0, 0) F_(0, 0) F_… macro
324 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
489 PINMUX_IPSR_GPSR(IP0_27_24, DU_DG2),
490 PINMUX_IPSR_GPSR(IP0_27_24, GETHER_RMII_TXD1),
491 PINMUX_IPSR_GPSR(IP0_27_24, A6),
2687 IP0_27_24
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| H A D | pfc-r8a77965.c | 149 #define GPSR2_0 F_(IRQ0, IP0_27_24)
264 #define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD… macro
455 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
678 PINMUX_IPSR_GPSR(IP0_27_24, IRQ0),
679 PINMUX_IPSR_GPSR(IP0_27_24, QPOLB),
680 PINMUX_IPSR_GPSR(IP0_27_24, DU_CDE),
681 PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA0_B, SEL_VIN4_1),
682 PINMUX_IPSR_MSEL(IP0_27_24, CAN0_TX_B, SEL_RCAN0_1),
683 PINMUX_IPSR_MSEL(IP0_27_24, CANFD0_TX_B, SEL_CANFD0_1),
684 PINMUX_IPSR_MSEL(IP0_27_24, MSIOF3_SS2_E, SEL_MSIOF3_4),
[all …]
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| H A D | pfc-r8a77951.c | 144 #define GPSR2_0 F_(IRQ0, IP0_27_24)
259 #define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD… macro
450 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
672 PINMUX_IPSR_GPSR(IP0_27_24, IRQ0),
673 PINMUX_IPSR_GPSR(IP0_27_24, QPOLB),
674 PINMUX_IPSR_GPSR(IP0_27_24, DU_CDE),
675 PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA0_B, SEL_VIN4_1),
676 PINMUX_IPSR_MSEL(IP0_27_24, CAN0_TX_B, SEL_RCAN0_1),
677 PINMUX_IPSR_MSEL(IP0_27_24, CANFD0_TX_B, SEL_CANFD0_1),
678 PINMUX_IPSR_MSEL(IP0_27_24, MSIOF3_SS2_E, SEL_MSIOF3_4),
[all …]
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| H A D | pfc-r8a7796.c | 149 #define GPSR2_0 F_(IRQ0, IP0_27_24)
264 #define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD… macro
455 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
677 PINMUX_IPSR_GPSR(IP0_27_24, IRQ0),
678 PINMUX_IPSR_GPSR(IP0_27_24, QPOLB),
679 PINMUX_IPSR_GPSR(IP0_27_24, DU_CDE),
680 PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA0_B, SEL_VIN4_1),
681 PINMUX_IPSR_MSEL(IP0_27_24, CAN0_TX_B, SEL_RCAN0_1),
682 PINMUX_IPSR_MSEL(IP0_27_24, CANFD0_TX_B, SEL_CANFD0_1),
683 PINMUX_IPSR_MSEL(IP0_27_24, MSIOF3_SS2_E, SEL_MSIOF3_4),
[all …]
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| H A D | pfc-r8a77990.c | 131 #define GPSR2_7 F_(QSPI1_MOSI_IO0, IP0_27_24)
220 #define IP0_27_24 FM(QSPI1_MOSI_IO0) FM(RIF2_SYNC_A) FM(HTX4_B) FM(VI4_DATA1_A) F_(0, 0) F_(0, … macro
392 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
575 PINMUX_IPSR_GPSR(IP0_27_24, QSPI1_MOSI_IO0),
576 PINMUX_IPSR_MSEL(IP0_27_24, RIF2_SYNC_A, SEL_DRIF2_0),
577 PINMUX_IPSR_GPSR(IP0_27_24, HTX4_B),
578 PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA1_A, SEL_VIN4_0),
4790 IP0_27_24
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| H A D | pfc-r8a77470.c | 571 PINMUX_IPSR_GPSR(IP0_27_24, SD0_CD),
572 PINMUX_IPSR_MSEL(IP0_27_24, CAN0_RX_A, SEL_CAN0_0),
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