Searched refs:INTERRUPT_ENABLE (Results 1 – 3 of 3) sorted by relevance
19 #define INTERRUPT_ENABLE (1 << 2) macro22 #define DESCRIPTOR_FLAG_MSK (END_OF_CHAIN | INTERRUPT_ENABLE | WRITE_TO_PCI)258 (to_pci ? WRITE_TO_PCI : 0) | INTERRUPT_ENABLE; in descriptor_list_create()279 d->next_l = direction | INTERRUPT_ENABLE | END_OF_CHAIN; in descriptor_list_chain()282 d->next_l = (u32)next->bus | direction | INTERRUPT_ENABLE; in descriptor_list_chain()306 d->next_l |= INTERRUPT_ENABLE; in descriptor_list_interrupt_enable()313 d->next_l &= ~INTERRUPT_ENABLE; in descriptor_list_interrupt_disable()
37 #define INTERRUPT_ENABLE (INTERRUPT_BASE + 0x00) macro
33 #define INTERRUPT_ENABLE 0x08 macro248 writel(0x01, idev->base + INTERRUPT_ENABLE); in axxia_i2c_init()674 writel(INT_MST | INT_SLV, idev->base + INTERRUPT_ENABLE); in axxia_i2c_reg_slave()699 writel(INT_MST, idev->base + INTERRUPT_ENABLE); in axxia_i2c_unreg_slave()