Searched refs:ICL_PORT_TX_DW8_ODCC_CLK_DIV_SEL_MASK (Results 1 – 2 of 2) sorted by relevance
158 #define ICL_PORT_TX_DW8_ODCC_CLK_DIV_SEL_MASK REG_GENMASK(30, 29) macro159 …ne ICL_PORT_TX_DW8_ODCC_CLK_DIV_SEL_DIV2 REG_FIELD_PREP(ICL_PORT_TX_DW8_ODCC_CLK_DIV_SEL_MASK, 0…
229 ICL_PORT_TX_DW8_ODCC_CLK_DIV_SEL_MASK, in icl_combo_phy_verify_state()351 val &= ~ICL_PORT_TX_DW8_ODCC_CLK_DIV_SEL_MASK; in icl_combo_phys_init()