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Searched refs:ICC_SRE_EL1_SRE (Results 1 – 4 of 4) sorted by relevance

/linux/include/linux/irqchip/
H A Darm-gic-v3.h579 #define ICC_SRE_EL1_SRE (1U << 0) macro
650 if (val & ICC_SRE_EL1_SRE) in gic_enable_sre()
653 val |= ICC_SRE_EL1_SRE; in gic_enable_sre()
657 return !!(val & ICC_SRE_EL1_SRE); in gic_enable_sre()
/linux/tools/testing/selftests/kvm/lib/arm64/
H A Dgic_v3.c344 write_sysreg_s(read_sysreg_s(SYS_ICC_SRE_EL1) | ICC_SRE_EL1_SRE, in gicv3_cpu_init()
/linux/arch/arm64/kvm/
H A Dvgic-sys-reg-v3.c284 if (!(val & ICC_SRE_EL1_SRE)) in set_gic_sre()
/linux/arch/arm64/kvm/vgic/
H A Dvgic-v3.c486 ICC_SRE_EL1_SRE); in vgic_v3_reset()