Searched refs:HDMI_READ (Results 1 – 5 of 5) sorted by relevance
35 #define HDMI_READ(reg) readl(hdmi_dev->regs + (reg)) macro81 temp = HDMI_READ(HDMI_HICR); in hdmi_i2c_irq_enable()84 HDMI_READ(HDMI_HICR); in hdmi_i2c_irq_enable()90 HDMI_READ(HDMI_HICR); in hdmi_i2c_irq_disable()107 HDMI_READ(HDMI_HI2CHCR); in xfer_read()184 temp = HDMI_READ(HDMI_HI2CRDB0 + (i * 4)); in hdmi_i2c_read()190 temp = HDMI_READ(HDMI_HISR); in hdmi_i2c_read()192 HDMI_READ(HDMI_HISR); in hdmi_i2c_read()195 temp = HDMI_READ(HDMI_HI2CHCR); in hdmi_i2c_read()197 HDMI_READ(HDMI_HI2CHCR); in hdmi_i2c_read()[all …]
39 #define HDMI_READ(reg) readl(hdmi_dev->regs + (reg)) macro140 HDMI_READ(HDMI_HCR); in oaktrail_hdmi_audio_enable()143 HDMI_READ(0x51a8); in oaktrail_hdmi_audio_enable()146 HDMI_READ(HDMI_AUDIO_CTRL); in oaktrail_hdmi_audio_enable()155 HDMI_READ(0x51a8); in oaktrail_hdmi_audio_disable()158 HDMI_READ(HDMI_AUDIO_CTRL); in oaktrail_hdmi_audio_disable()161 HDMI_READ(HDMI_HCR); in oaktrail_hdmi_audio_disable()539 temp = HDMI_READ(HDMI_HSR); in oaktrail_hdmi_detect()
162 HDMI_READ(HDMI_TX_PHY_CTL_0) & in vc4_hdmi_phy_rng_enable()173 HDMI_READ(HDMI_TX_PHY_CTL_0) | in vc4_hdmi_phy_rng_disable()384 HDMI_READ(HDMI_TX_PHY_RESET_CTL) & in vc5_hdmi_phy_init()391 HDMI_READ(HDMI_RM_CONTROL) | in vc5_hdmi_phy_init()397 (HDMI_READ(HDMI_TX_PHY_PLL_CALIBRATION_CONFIG_1) & in vc5_hdmi_phy_init()402 (HDMI_READ(HDMI_TX_PHY_PLL_CALIBRATION_CONFIG_2) & in vc5_hdmi_phy_init()425 HDMI_READ(HDMI_TX_PHY_PLL_CTL_1) | in vc5_hdmi_phy_init()432 HDMI_READ(HDMI_RM_FORMAT) | in vc5_hdmi_phy_init()436 HDMI_READ(HDMI_TX_PHY_PLL_CFG) | in vc5_hdmi_phy_init()486 HDMI_READ(HDMI_TX_PHY_CTL_1) | in vc5_hdmi_phy_init()[all …]
217 HDMI_READ(HDMI_CLOCK_STOP) | VC4_DVP_HT_CLOCK_STOP_PIXEL); in vc5_hdmi_reset()248 value = HDMI_READ(HDMI_CEC_CNTRL_1); in vc4_hdmi_cec_update_clk_div()659 HDMI_READ(HDMI_RAM_PACKET_CONFIG) & ~BIT(packet_id)); in vc4_hdmi_stop_packet()663 ret = wait_for(!(HDMI_READ(HDMI_RAM_PACKET_STATUS) & in vc4_hdmi_stop_packet()701 WARN_ONCE(!(HDMI_READ(HDMI_RAM_PACKET_CONFIG) & in vc4_hdmi_write_infoframe()736 HDMI_READ(HDMI_RAM_PACKET_CONFIG) | BIT(packet_id)); in vc4_hdmi_write_infoframe()740 ret = wait_for((HDMI_READ(HDMI_RAM_PACKET_STATUS) & in vc4_hdmi_write_infoframe()778 HDMI_WRITE(HDMI_SCRAMBLER_CTL, HDMI_READ(HDMI_SCRAMBLER_CTL) | in vc4_hdmi_enable_scrambling()812 HDMI_WRITE(HDMI_SCRAMBLER_CTL, HDMI_READ(HDMI_SCRAMBLER_CTL) & in vc4_hdmi_disable_scrambling()858 HDMI_WRITE(HDMI_VID_CTL, HDMI_READ(HDMI_VID_CTL) | VC4_HD_VID_CTL_CLRRGB); in vc4_hdmi_encoder_post_crtc_disable()[all …]
477 #define HDMI_READ(reg) vc4_hdmi_read(vc4_hdmi, reg) macro