Searched refs:HDMI_1_CFG_1 (Results 1 – 2 of 2) sorted by relevance
342 mtk_phy_update_field(regs + HDMI_1_CFG_1, RG_HDMITX21_DRV_IBIAS_D0, data_channel_bias); in mtk_hdmi_pll_drv_setting()343 mtk_phy_update_field(regs + HDMI_1_CFG_1, RG_HDMITX21_DRV_IBIAS_D1, data_channel_bias); in mtk_hdmi_pll_drv_setting()344 mtk_phy_update_field(regs + HDMI_1_CFG_1, RG_HDMITX21_DRV_IBIAS_D2, data_channel_bias); in mtk_hdmi_pll_drv_setting()
27 #define HDMI_1_CFG_1 0x04 macro