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Searched refs:EVENT_CONSTRAINT (Results 1 – 5 of 5) sorted by relevance

/linux/arch/x86/events/
H A Dperf_event.h410 #define EVENT_CONSTRAINT(c, n, m) \ macro
452 EVENT_CONSTRAINT(c, n, ARCH_PERFMON_EVENTSEL_EVENT)
475 EVENT_CONSTRAINT(c, (1ULL << (32+n)), FIXED_EVENT_FLAGS)
487 EVENT_CONSTRAINT(c, (1ULL << (INTEL_PMC_IDX_METRIC_BASE + n)), \
494 EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK)
498 EVENT_CONSTRAINT(c, n, ARCH_PERFMON_EVENTSEL_EVENT|(c))
502 EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS)
534 EVENT_CONSTRAINT(c, n, ARCH_PERFMON_EVENTSEL_EVENT|X86_ALL_EVENT_FLAGS)
541 EVENT_CONSTRAINT(code, n, X86_ALL_EVENT_FLAGS)
/linux/arch/x86/events/amd/
H A Dcore.c1155 static struct event_constraint amd_f15_PMC0 = EVENT_CONSTRAINT(0, 0x01, 0);
1156 static struct event_constraint amd_f15_PMC20 = EVENT_CONSTRAINT(0, 0x07, 0);
1157 static struct event_constraint amd_f15_PMC3 = EVENT_CONSTRAINT(0, 0x08, 0);
1159 static struct event_constraint amd_f15_PMC50 = EVENT_CONSTRAINT(0, 0x3F, 0);
1160 static struct event_constraint amd_f15_PMC53 = EVENT_CONSTRAINT(0, 0x38, 0);
1273 EVENT_CONSTRAINT(0, 0x1, AMD64_RAW_EVENT_MASK);
/linux/arch/x86/events/intel/
H A Duncore.c34 EVENT_CONSTRAINT(~0ULL, 1 << UNCORE_PMC_IDX_FIXED, ~0ULL);
36 EVENT_CONSTRAINT(0, 0, 0);
H A Dds.c1113 EVENT_CONSTRAINT(0, 1ULL << INTEL_PMC_IDX_FIXED_BTS, 0);
H A Dcore.c5465 EVENT_CONSTRAINT(0, 0x4, 0);