| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_smu.h | 104 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS]; member
130 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS]; member
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| H A D | dcn35_clk_mgr.c | 1106 if (bw_params->clk_table.entries[j].dcfclk_mhz <= clock_table->DcfClocks[entry_idx]) in dcn35_clk_mgr_helper_populate_bw_params()
1116 bw_params->clk_table.entries[entry_idx].dcfclk_mhz = clock_table->DcfClocks[entry_idx]; in dcn35_clk_mgr_helper_populate_bw_params()
1124 …bw_params->clk_table.entries[entry_idx].fclk_mhz = min(max_fclk, 2 * clock_table->DcfClocks[entry_… in dcn35_clk_mgr_helper_populate_bw_params()
1137 find_max_clk_value(clock_table->DcfClocks, NUM_DCFCLK_DPM_LEVELS); in dcn35_clk_mgr_helper_populate_bw_params()
1157 …ASSERT(clock_table->DcfClocks[i] == find_max_clk_value(clock_table->DcfClocks, NUM_DCFCLK_DPM_LEVE… in dcn35_clk_mgr_helper_populate_bw_params()
1380 smu_dpm_clks_b->dpm_clks->DcfClocks[i] = smu_dpm_clks_a->dpm_clks->DcfClocks[i]; in translate_to_DpmClocks_t_dcn35()
1535 smu_dpm_clks.dpm_clks->DcfClocks[i]); in dcn35_clk_mgr_construct()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/ |
| H A D | smu15_driver_if_v15_0_0.h | 121 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS]; member
150 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS]; member
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| H A D | smu13_driver_if_v13_0_5.h | 111 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS]; member
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| H A D | smu13_driver_if_yellow_carp.h | 122 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS]; member
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| H A D | smu12_driver_if.h | 117 DpmClock_t DcfClocks[NUM_DCFCLK_DPM_LEVELS]; member
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| H A D | smu13_driver_if_v13_0_4.h | 123 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS]; member
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| H A D | smu11_driver_if_vangogh.h | 128 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS]; member
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| H A D | dcn314_clk_mgr.c | 678 if (bw_params->clk_table.entries[j].dcfclk_mhz <= clock_table->DcfClocks[i]) in dcn314_clk_mgr_helper_populate_bw_params()
689 bw_params->clk_table.entries[i].dcfclk_mhz = clock_table->DcfClocks[i]; in dcn314_clk_mgr_helper_populate_bw_params()
705 …bw_params->clk_table.entries[i].dcfclk_mhz = find_max_clk_value(clock_table->DcfClocks, NUM_DCFCLK… in dcn314_clk_mgr_helper_populate_bw_params()
719 …ASSERT(clock_table->DcfClocks[i] == find_max_clk_value(clock_table->DcfClocks, NUM_DCFCLK_DPM_LEVE… in dcn314_clk_mgr_helper_populate_bw_params()
891 smu_dpm_clks.dpm_clks->DcfClocks[i]); in dcn314_clk_mgr_construct()
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| H A D | dcn314_smu.h | 50 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS]; member
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| H A D | dcn315_smu.h | 70 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS]; member
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| H A D | dcn316_smu.h | 78 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS]; member
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| H A D | dcn301_smu.h | 99 uint32_t DcfClocks[VG_NUM_DCFCLK_DPM_LEVELS]; member
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dm_pp_smu.h | 261 struct dpm_clock DcfClocks[PP_SMU_NUM_DCFCLK_DPM_LEVELS]; member
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| H A D | dcn31_smu.h | 131 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS]; member
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| H A D | dcn31_clk_mgr.c | 616 …[entry_idx].dcfclk_mhz = find_clk_for_voltage(clock_table, clock_table->DcfClocks, clock_table->Df… in dcn31_clk_mgr_helper_populate_bw_params()
775 smu_dpm_clks.dpm_clks->DcfClocks[i]); in dcn31_clk_mgr_construct()
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