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Searched refs:DSP_REG_BAR (Results 1 – 7 of 7) sorted by relevance

/linux/sound/soc/sof/mediatek/mt8195/
H A Dmt8195-loader.c16 snd_sof_dsp_write(sdev, DSP_REG_BAR, DSP_ALTRESETVEC, boot_addr); in sof_hifixdsp_boot_sequence()
19 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW, in sof_hifixdsp_boot_sequence()
23 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW, in sof_hifixdsp_boot_sequence()
28 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW, in sof_hifixdsp_boot_sequence()
36 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW, in sof_hifixdsp_boot_sequence()
41 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_PDEBUGBUS0, in sof_hifixdsp_boot_sequence()
46 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW, in sof_hifixdsp_boot_sequence()
53 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW, in sof_hifixdsp_shutdown()
57 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, DSP_RESET_SW, in sof_hifixdsp_shutdown()
H A Dmt8195.c298 sdev->bar[DSP_REG_BAR] = priv->adsp->va_cfgreg; in mt8195_dsp_probe()
359 ret = snd_sof_dsp_read_poll_timeout(sdev, DSP_REG_BAR, in mt8195_dsp_suspend()
365 dbg_pc = snd_sof_dsp_read(sdev, DSP_REG_BAR, DSP_PDEBUGPC); in mt8195_dsp_suspend()
457 dbg_pc = snd_sof_dsp_read(sdev, DSP_REG_BAR, DSP_PDEBUGPC); in mt8195_adsp_dump()
458 dbg_data = snd_sof_dsp_read(sdev, DSP_REG_BAR, DSP_PDEBUGDATA); in mt8195_adsp_dump()
459 dbg_bus0 = snd_sof_dsp_read(sdev, DSP_REG_BAR, DSP_PDEBUGBUS0); in mt8195_adsp_dump()
460 dbg_bus1 = snd_sof_dsp_read(sdev, DSP_REG_BAR, DSP_PDEBUGBUS1); in mt8195_adsp_dump()
461 dbg_inst = snd_sof_dsp_read(sdev, DSP_REG_BAR, DSP_PDEBUGINST); in mt8195_adsp_dump()
462 dbg_ls0stat = snd_sof_dsp_read(sdev, DSP_REG_BAR, DSP_PDEBUGLS0STAT); in mt8195_adsp_dump()
463 dbg_ls1stat = snd_sof_dsp_read(sdev, DSP_REG_BAR, DSP_PDEBUGLS1STAT); in mt8195_adsp_dump()
[all …]
H A Dmt8195.h137 #define DSP_REG_BAR 4 macro
/linux/sound/soc/sof/mediatek/mt8186/
H A Dmt8186-loader.c17 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, ADSP_HIFI_IO_CONFIG, in mt8186_sof_hifixdsp_boot_sequence()
21 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, ADSP_MBOX_IRQ_EN, in mt8186_sof_hifixdsp_boot_sequence()
30 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, ADSP_CFGREG_SW_RSTN, in mt8186_sof_hifixdsp_boot_sequence()
38 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, ADSP_CFGREG_SW_RSTN, in mt8186_sof_hifixdsp_boot_sequence()
43 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, ADSP_HIFI_IO_CONFIG, in mt8186_sof_hifixdsp_boot_sequence()
50 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, ADSP_HIFI_IO_CONFIG, in mt8186_sof_hifixdsp_shutdown()
54 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, ADSP_CFGREG_SW_RSTN, in mt8186_sof_hifixdsp_shutdown()
H A Dmt8186-clk.c86 snd_sof_dsp_write(sdev, DSP_REG_BAR, ADSP_CK_EN, in mt8186_adsp_clock_on()
88 snd_sof_dsp_write(sdev, DSP_REG_BAR, ADSP_UART_CTRL, in mt8186_adsp_clock_on()
96 snd_sof_dsp_write(sdev, DSP_REG_BAR, ADSP_CK_EN, 0); in mt8186_adsp_clock_off()
97 snd_sof_dsp_write(sdev, DSP_REG_BAR, ADSP_UART_CTRL, 0); in mt8186_adsp_clock_off()
H A Dmt8186.c284 sdev->bar[DSP_REG_BAR] = priv->adsp->va_cfgreg; in mt8186_dsp_probe()
437 dbg_pc = snd_sof_dsp_read(sdev, DSP_REG_BAR, DSP_PDEBUGPC); in mt8186_adsp_dump()
438 dbg_data = snd_sof_dsp_read(sdev, DSP_REG_BAR, DSP_PDEBUGDATA); in mt8186_adsp_dump()
439 dbg_inst = snd_sof_dsp_read(sdev, DSP_REG_BAR, DSP_PDEBUGINST); in mt8186_adsp_dump()
440 dbg_ls0stat = snd_sof_dsp_read(sdev, DSP_REG_BAR, DSP_PDEBUGLS0STAT); in mt8186_adsp_dump()
441 dbg_status = snd_sof_dsp_read(sdev, DSP_REG_BAR, DSP_PDEBUGSTATUS); in mt8186_adsp_dump()
442 faultinfo = snd_sof_dsp_read(sdev, DSP_REG_BAR, DSP_PFAULTINFO); in mt8186_adsp_dump()
H A Dmt8186.h15 #define DSP_REG_BAR 4 macro