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Searched refs:DSC_TOP_CONTROL (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn35/
H A Ddcn35_dsc.c96 REG_GET(DSC_TOP_CONTROL, DSC_CLOCK_EN, &dsc_clock_en); in dsc35_enable()
103 REG_UPDATE(DSC_TOP_CONTROL, in dsc35_enable()
113 REG_UPDATE(DSC_TOP_CONTROL, DSC_FGCG_REP_DIS, !enable); in dsc35_set_fgcg()
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
H A Ddcn401_dsc.c100 REG_GET(DSC_TOP_CONTROL, DSC_CLOCK_EN, &s->dsc_clock_en); in dsc401_read_state()
153 REG_GET(DSC_TOP_CONTROL, DSC_CLOCK_EN, &dsc_clock_en); in dsc401_enable()
160 REG_UPDATE(DSC_TOP_CONTROL, in dsc401_enable()
176 REG_GET(DSC_TOP_CONTROL, DSC_CLOCK_EN, &dsc_clock_en); in dsc401_disable()
184 REG_UPDATE(DSC_TOP_CONTROL, in dsc401_disable()
398 REG_UPDATE(DSC_TOP_CONTROL, DSC_FGCG_REP_DIS, !enable); in dsc401_set_fgcg()
H A Ddcn401_dsc.h203 uint32_t DSC_TOP_CONTROL; member
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
H A Ddcn20_dsc.c147 REG_GET(DSC_TOP_CONTROL, DSC_CLOCK_EN, &s->dsc_clock_en); in dsc2_read_state()
163 dccg_reg_state->dsc_top_control = REG_READ(DSC_TOP_CONTROL); in dsc2_read_reg_state()
236 REG_GET(DSC_TOP_CONTROL, DSC_CLOCK_EN, &dsc_clock_en); in dsc2_enable()
243 REG_UPDATE(DSC_TOP_CONTROL, in dsc2_enable()
259 REG_GET(DSC_TOP_CONTROL, DSC_CLOCK_EN, &dsc_clock_en); in dsc2_disable()
267 REG_UPDATE(DSC_TOP_CONTROL, in dsc2_disable()