Searched refs:DGT_CLK_CTL_DIV_4 (Results 1 – 1 of 1) sorted by relevance
29 #define DGT_CLK_CTL_DIV_4 0x3 macro245 writel_relaxed(DGT_CLK_CTL_DIV_4, source_base + DGT_CLK_CTL); in msm_dt_timer_init()