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Searched refs:DDRPLL (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/clk/nuvoton/
H A Dclk-ma35d1-pll.c235 case DDRPLL: in ma35d1_clk_pll_recalc_rate()
267 case DDRPLL: in ma35d1_clk_pll_round_rate()
347 if (id == CAPLL || id == DDRPLL) in ma35d1_reg_clk_pll()
H A Dclk-ma35d1.c504 hws[DDRPLL] = ma35d1_reg_clk_pll(dev, DDRPLL, pllmode[1], "ddrpll", in ma35d1_clocks_probe()
/linux/arch/arm64/boot/dts/nuvoton/
H A Dma35d1-iot-512m.dts42 <&clk DDRPLL>,
H A Dma35d1-som-256m.dts42 <&clk DDRPLL>,
/linux/include/dt-bindings/clock/
H A Dnuvoton,ma35d1-clk.h21 #define DDRPLL 10 macro
/linux/Documentation/devicetree/bindings/clock/
H A Dkeystone-pll.txt2 a divider and a post divider. The additional PLL IPs like ARMPLL, DDRPLL