Home
last modified time | relevance | path

Searched refs:DC_GPU_TIMER_READ__DC_GPU_TIMER_READ_MASK (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h3857 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ_MASK 0xffffffffL macro
H A Ddce_8_0_sh_mask.h3329 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ_MASK 0xffffffff macro
H A Ddce_11_0_sh_mask.h3323 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ_MASK 0xffffffff macro
H A Ddce_10_0_sh_mask.h3251 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ_MASK 0xffffffff macro
H A Ddce_11_2_sh_mask.h3573 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ_MASK 0xffffffff macro
H A Ddce_12_0_sh_mask.h9416 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h4928 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ_MASK … macro
H A Ddcn_3_0_1_sh_mask.h3860 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ_MASK … macro
H A Ddcn_2_1_0_sh_mask.h3645 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ_MASK … macro
H A Ddcn_3_5_1_sh_mask.h8161 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ_MASK … macro
H A Ddcn_3_5_0_sh_mask.h8182 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ_MASK … macro
H A Ddcn_2_0_0_sh_mask.h3913 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ_MASK … macro
H A Ddcn_4_1_0_sh_mask.h1329 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ_MASK … macro