Searched refs:DC_CMD_STATE_CONTROL (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/gpu/drm/tegra/ |
| H A D | dc.c | 124 tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL); in tegra_dc_commit()
125 tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); in tegra_dc_commit()
1085 tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL); in tegra_cursor_atomic_async_update()
1086 (void)tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); in tegra_cursor_atomic_async_update()
1089 tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL); in tegra_cursor_atomic_async_update()
1090 (void)tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); in tegra_cursor_atomic_async_update()
1458 DEBUGFS_REG32(DC_CMD_STATE_CONTROL),
2322 tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL); in tegra_crtc_atomic_flush()
2323 value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL); in tegra_crtc_atomic_flush()
2326 tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL); in tegra_crtc_atomic_flush()
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| H A D | dc.h | 242 #define DC_CMD_STATE_CONTROL 0x041 macro
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