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Searched refs:CVMX_PEXP_SLI_CTL_PORTX (Results 1 – 2 of 2) sorted by relevance

/linux/arch/mips/pci/
H A Dpcie-octeon.c1404 sli_ctl_portx.u64 = cvmx_read_csr(CVMX_PEXP_SLI_CTL_PORTX(pcie_port)); in __cvmx_pcie_rc_initialize_gen2()
1409 cvmx_write_csr(CVMX_PEXP_SLI_CTL_PORTX(pcie_port), sli_ctl_portx.u64); in __cvmx_pcie_rc_initialize_gen2()
2074 sli_ctl_portx.u64 = cvmx_read_csr(CVMX_PEXP_SLI_CTL_PORTX(port)); in octeon_pcie_setup()
2079 cvmx_write_csr(CVMX_PEXP_SLI_CTL_PORTX(port), sli_ctl_portx.u64); in octeon_pcie_setup()
2081 sli_ctl_portx.u64 = cvmx_read_csr(CVMX_PEXP_SLI_CTL_PORTX(!port)); in octeon_pcie_setup()
2086 cvmx_write_csr(CVMX_PEXP_SLI_CTL_PORTX(!port), sli_ctl_portx.u64); in octeon_pcie_setup()
/linux/arch/mips/include/asm/octeon/
H A Dcvmx-pexp-defs.h135 #define CVMX_PEXP_SLI_CTL_PORTX(offset) (CVMX_ADD_IO_SEG(0x00011F0000010050ull) + ((offset) & 3) * … macro