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Searched refs:CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE_MASK (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2918 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE_MASK 0x03000000L macro
H A Dgfx_7_2_sh_mask.h2571 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE_MASK 0x3000000 macro
H A Dgfx_8_1_sh_mask.h3657 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE_MASK 0x3000000 macro
H A Dgfx_8_0_sh_mask.h3135 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE_MASK 0x3000000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h19394 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE_MASK … macro
H A Dgc_9_1_sh_mask.h20701 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE_MASK … macro
H A Dgc_9_2_1_sh_mask.h20628 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE_MASK … macro
H A Dgc_9_4_2_sh_mask.h12855 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE_MASK … macro
H A Dgc_11_5_0_sh_mask.h22790 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE_MASK … macro
H A Dgc_11_0_0_sh_mask.h26778 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE_MASK … macro
H A Dgc_10_1_0_sh_mask.h27303 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE_MASK … macro
H A Dgc_11_0_3_sh_mask.h29278 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE_MASK … macro