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Searched refs:CP_ROQ1_THRESHOLDS__R0_IB1_START_MASK (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3129 #define CP_ROQ1_THRESHOLDS__R0_IB1_START_MASK 0xff0000 macro
H A Dgfx_8_1_sh_mask.h4265 #define CP_ROQ1_THRESHOLDS__R0_IB1_START_MASK 0xff0000 macro
H A Dgfx_8_0_sh_mask.h3743 #define CP_ROQ1_THRESHOLDS__R0_IB1_START_MASK 0xff0000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1228 #define CP_ROQ1_THRESHOLDS__R0_IB1_START_MASK … macro
H A Dgc_9_1_sh_mask.h1127 #define CP_ROQ1_THRESHOLDS__R0_IB1_START_MASK … macro
H A Dgc_9_2_1_sh_mask.h1094 #define CP_ROQ1_THRESHOLDS__R0_IB1_START_MASK … macro
H A Dgc_9_4_2_sh_mask.h1727 #define CP_ROQ1_THRESHOLDS__R0_IB1_START_MASK … macro
H A Dgc_11_5_0_sh_mask.h3731 #define CP_ROQ1_THRESHOLDS__R0_IB1_START_MASK … macro
H A Dgc_11_0_0_sh_mask.h6578 #define CP_ROQ1_THRESHOLDS__R0_IB1_START_MASK … macro
H A Dgc_12_0_0_sh_mask.h7019 #define CP_ROQ1_THRESHOLDS__R0_IB1_START_MASK … macro
H A Dgc_10_1_0_sh_mask.h6714 #define CP_ROQ1_THRESHOLDS__R0_IB1_START_MASK … macro
H A Dgc_11_0_3_sh_mask.h7353 #define CP_ROQ1_THRESHOLDS__R0_IB1_START_MASK … macro