Home
last modified time | relevance | path

Searched refs:CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h2773 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK 0x2 macro
H A Dgfx_8_1_sh_mask.h3865 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK 0x2 macro
H A Dgfx_8_0_sh_mask.h3343 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK 0x2 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h19565 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK … macro
H A Dgc_9_1_sh_mask.h20872 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK … macro
H A Dgc_9_2_1_sh_mask.h20799 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK … macro
H A Dgc_9_4_2_sh_mask.h13026 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK … macro
H A Dgc_11_5_0_sh_mask.h22934 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK … macro
H A Dgc_11_0_0_sh_mask.h26922 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK … macro
H A Dgc_12_0_0_sh_mask.h14750 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK … macro
H A Dgc_10_1_0_sh_mask.h27484 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK … macro
H A Dgc_11_0_3_sh_mask.h29422 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN_MASK … macro