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Searched refs:CP_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED_MASK (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2454 #define CP_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED_MASK 0x00800000L macro
H A Dgfx_7_2_sh_mask.h3221 #define CP_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED_MASK 0x800000 macro
H A Dgfx_8_1_sh_mask.h4363 #define CP_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED_MASK 0x800000 macro
H A Dgfx_8_0_sh_mask.h3841 #define CP_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED_MASK 0x800000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1355 #define CP_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED_MASK … macro
H A Dgc_9_1_sh_mask.h1231 #define CP_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED_MASK … macro
H A Dgc_9_4_2_sh_mask.h1831 #define CP_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED_MASK … macro
H A Dgc_11_5_0_sh_mask.h3815 #define CP_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED_MASK … macro
H A Dgc_11_0_0_sh_mask.h6662 #define CP_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED_MASK … macro
H A Dgc_12_0_0_sh_mask.h7134 #define CP_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED_MASK … macro
H A Dgc_10_1_0_sh_mask.h6833 #define CP_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED_MASK … macro
H A Dgc_11_0_3_sh_mask.h7468 #define CP_INT_STAT_DEBUG__PRIV_REG_INT_ASSERTED_MASK … macro