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Searched refs:CP_INT_STATUS_RING0__PRIV_REG_INT_STAT_MASK (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2498 #define CP_INT_STATUS_RING0__PRIV_REG_INT_STAT_MASK 0x00800000L macro
H A Dgfx_7_2_sh_mask.h1277 #define CP_INT_STATUS_RING0__PRIV_REG_INT_STAT_MASK 0x800000 macro
H A Dgfx_8_1_sh_mask.h2153 #define CP_INT_STATUS_RING0__PRIV_REG_INT_STAT_MASK 0x800000 macro
H A Dgfx_8_0_sh_mask.h1629 #define CP_INT_STATUS_RING0__PRIV_REG_INT_STAT_MASK 0x800000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11109 #define CP_INT_STATUS_RING0__PRIV_REG_INT_STAT_MASK … macro
H A Dgc_9_1_sh_mask.h12586 #define CP_INT_STATUS_RING0__PRIV_REG_INT_STAT_MASK … macro
H A Dgc_9_2_1_sh_mask.h12390 #define CP_INT_STATUS_RING0__PRIV_REG_INT_STAT_MASK … macro
H A Dgc_9_4_2_sh_mask.h2406 #define CP_INT_STATUS_RING0__PRIV_REG_INT_STAT_MASK … macro
H A Dgc_11_5_0_sh_mask.h12298 #define CP_INT_STATUS_RING0__PRIV_REG_INT_STAT_MASK … macro
H A Dgc_11_0_0_sh_mask.h15482 #define CP_INT_STATUS_RING0__PRIV_REG_INT_STAT_MASK … macro
H A Dgc_12_0_0_sh_mask.h11920 #define CP_INT_STATUS_RING0__PRIV_REG_INT_STAT_MASK … macro
H A Dgc_10_1_0_sh_mask.h18060 #define CP_INT_STATUS_RING0__PRIV_REG_INT_STAT_MASK … macro
H A Dgc_11_0_3_sh_mask.h17637 #define CP_INT_STATUS_RING0__PRIV_REG_INT_STAT_MASK … macro