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Searched refs:CP_INT_CNTL__CMP_BUSY_INT_ENABLE_MASK (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_sh_mask.h1993 #define CP_INT_CNTL__CMP_BUSY_INT_ENABLE_MASK 0x40000 macro
H A Dgfx_8_0_sh_mask.h1469 #define CP_INT_CNTL__CMP_BUSY_INT_ENABLE_MASK 0x40000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h10774 #define CP_INT_CNTL__CMP_BUSY_INT_ENABLE_MASK … macro
H A Dgc_9_1_sh_mask.h12251 #define CP_INT_CNTL__CMP_BUSY_INT_ENABLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h12055 #define CP_INT_CNTL__CMP_BUSY_INT_ENABLE_MASK … macro
H A Dgc_9_4_2_sh_mask.h2071 #define CP_INT_CNTL__CMP_BUSY_INT_ENABLE_MASK … macro
H A Dgc_11_5_0_sh_mask.h12012 #define CP_INT_CNTL__CMP_BUSY_INT_ENABLE_MASK … macro
H A Dgc_11_0_0_sh_mask.h15196 #define CP_INT_CNTL__CMP_BUSY_INT_ENABLE_MASK … macro
H A Dgc_12_0_0_sh_mask.h11680 #define CP_INT_CNTL__CMP_BUSY_INT_ENABLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h17690 #define CP_INT_CNTL__CMP_BUSY_INT_ENABLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h17351 #define CP_INT_CNTL__CMP_BUSY_INT_ENABLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h15950 #define CP_INT_CNTL__CMP_BUSY_INT_ENABLE_MASK … macro