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Searched refs:CP_HQD_PQ_BASE_HI__ADDR_HI_MASK (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3315 #define CP_HQD_PQ_BASE_HI__ADDR_HI_MASK 0xff macro
H A Dgfx_8_1_sh_mask.h4445 #define CP_HQD_PQ_BASE_HI__ADDR_HI_MASK 0xff macro
H A Dgfx_8_0_sh_mask.h3923 #define CP_HQD_PQ_BASE_HI__ADDR_HI_MASK 0xff macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12858 #define CP_HQD_PQ_BASE_HI__ADDR_HI_MASK … macro
H A Dgc_9_1_sh_mask.h14158 #define CP_HQD_PQ_BASE_HI__ADDR_HI_MASK … macro
H A Dgc_9_2_1_sh_mask.h14023 #define CP_HQD_PQ_BASE_HI__ADDR_HI_MASK … macro
H A Dgc_9_4_2_sh_mask.h3954 #define CP_HQD_PQ_BASE_HI__ADDR_HI_MASK … macro
H A Dgc_11_5_0_sh_mask.h14029 #define CP_HQD_PQ_BASE_HI__ADDR_HI_MASK … macro
H A Dgc_11_0_0_sh_mask.h17335 #define CP_HQD_PQ_BASE_HI__ADDR_HI_MASK … macro
H A Dgc_12_0_0_sh_mask.h13235 #define CP_HQD_PQ_BASE_HI__ADDR_HI_MASK … macro
H A Dgc_10_1_0_sh_mask.h20269 #define CP_HQD_PQ_BASE_HI__ADDR_HI_MASK … macro
H A Dgc_11_0_3_sh_mask.h19574 #define CP_HQD_PQ_BASE_HI__ADDR_HI_MASK … macro