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Searched refs:CLOCK_CNTL (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/video/fbdev/aty/
H A Dmach64_gx.c59 tmp = aty_ld_8(CLOCK_CNTL, par); in aty_StrobeClock()
60 aty_st_8(CLOCK_CNTL + par->clk_wr_offset, tmp | CLOCK_STROBE, par); in aty_StrobeClock()
409 tmp = aty_ld_8(CLOCK_CNTL, par); in aty_ICS2595_put1bit()
410 aty_st_8(CLOCK_CNTL + par->clk_wr_offset, in aty_ICS2595_put1bit()
413 tmp = aty_ld_8(CLOCK_CNTL, par); in aty_ICS2595_put1bit()
414 aty_st_8(CLOCK_CNTL + par->clk_wr_offset, (tmp & ~0x08) | (0 << 3), in aty_ICS2595_put1bit()
419 tmp = aty_ld_8(CLOCK_CNTL, par); in aty_ICS2595_put1bit()
420 aty_st_8(CLOCK_CNTL + par->clk_wr_offset, (tmp & ~0x08) | (1 << 3), in aty_ICS2595_put1bit()
439 old_clock_cntl = aty_ld_8(CLOCK_CNTL, par); in aty_set_pll18818()
440 aty_st_8(CLOCK_CNTL + par->clk_wr_offset, 0, par); in aty_set_pll18818()
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H A Dmach64_ct.c307 aty_st_8(CLOCK_CNTL, par->clk_wr_offset | CLOCK_STROBE, par); in aty_set_pll_ct()
383 clock = aty_ld_8(CLOCK_CNTL, par) & 0x03U; in aty_get_pll_ct()
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn30/
H A Ddcn30_dccg.h34 DCCG_SRII(CLOCK_CNTL, HDMICHARCLK, 0),\
/linux/include/video/
H A Dmach64.h117 #define CLOCK_CNTL 0x0090 /* Dword offset 0_24 */ macro
135 #define CLOCK_CNTL_ADDR CLOCK_CNTL + 1
138 #define CLOCK_CNTL_DATA CLOCK_CNTL + 2
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn31/
H A Ddcn31_dccg.h37 DCCG_SRII(CLOCK_CNTL, HDMICHARCLK, 0),\
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn314/
H A Ddcn314_dccg.h42 DCCG_SRII(CLOCK_CNTL, HDMICHARCLK, 0),\