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Searched refs:CLK_TOP_I2SO1_SEL (Results 1 – 2 of 2) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt2712-clk.h177 #define CLK_TOP_I2SO1_SEL 146 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt2712.c721 MUX_GATE(CLK_TOP_I2SO1_SEL, "i2so1_sel", i2so1_parents, 0x520, 0, 2, 7),