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Searched refs:CLK_TOP_I2C_SEL (Results 1 – 17 of 17) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt7986-clk.h55 #define CLK_TOP_I2C_SEL 32 macro
H A Dmediatek,mt7981-clk.h95 #define CLK_TOP_I2C_SEL 82 macro
H A Dmt8516-clk.h180 #define CLK_TOP_I2C_SEL 148 macro
H A Dmediatek,mt7988-clk.h75 #define CLK_TOP_I2C_SEL 47 macro
H A Dmt6765-clk.h155 #define CLK_TOP_I2C_SEL 120 macro
H A Dmediatek,mt8365-clk.h98 #define CLK_TOP_I2C_SEL 88 macro
H A Dmt2712-clk.h193 #define CLK_TOP_I2C_SEL 162 macro
H A Dmt8192-clk.h48 #define CLK_TOP_I2C_SEL 36 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt7986-topckgen.c188 MUX_GATE_CLR_SET_UPD(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents, 0x010,
H A Dclk-mt7981-topckgen.c305 MUX_GATE_CLR_SET_UPD(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents,
H A Dclk-mt7988-topckgen.c145 MUX_GATE_CLR_SET_UPD(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents, 0x040, 0x044, 0x048, 8, 2, 15,
H A Dclk-mt8516.c403 MUX(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents,
H A Dclk-mt8167.c592 MUX(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents,
H A Dclk-mt2712.c743 MUX_GATE(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents, 0x560, 0, 3, 7),
H A Dclk-mt8365.c488 MUX_GATE_CLR_SET_UPD(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents, 0x0b0,
H A Dclk-mt8192.c633 MUX_GATE_CLR_SET_UPD(CLK_TOP_I2C_SEL, "i2c_sel",
H A Dclk-mt6765.c448 MUX_GATE_CLR_SET_UPD(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents, CLK_CFG_6,