Home
last modified time | relevance | path

Searched refs:CLK_TOP_AES_FDE_SEL (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt6765-clk.h158 #define CLK_TOP_AES_FDE_SEL 123 macro
H A Dmediatek,mt8365-clk.h101 #define CLK_TOP_AES_FDE_SEL 91 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8365.c495 MUX_GATE_CLR_SET_UPD(CLK_TOP_AES_FDE_SEL, "aes_fde_sel",
H A Dclk-mt6765.c457 MUX_GATE_CLR_SET_UPD(CLK_TOP_AES_FDE_SEL, "aes_fde_sel",