Searched refs:CLK_TOP2_SENINF5 (Results 1 – 2 of 2) sorted by relevance
443 MUX_GATE_HWV_FENC_CLR_SET_UPD(CLK_TOP2_SENINF5, "seninf5", seninf_parents,
160 #define CLK_TOP2_SENINF5 5 macro