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Searched refs:CLK_PHASE_1_2 (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/gpu/drm/bridge/
H A Dchipone-icn6211.c36 #define CLK_PHASE_1_2 2 macro
435 sys_ctrl_1 |= FIELD_PREP(SYS_CTRL_1_CLK_PHASE_MSK, CLK_PHASE_1_2); in chipone_atomic_enable()