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Searched refs:CLK_MSDC_TOP_SRC_0P (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt8192-msdc.c26 GATE_MSDC_TOP(CLK_MSDC_TOP_SRC_0P, "msdc_top_src_0p", "infra_msdc0_src", 1),
/linux/include/dt-bindings/clock/
H A Dmt8192-clk.h396 #define CLK_MSDC_TOP_SRC_0P 1 macro
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8192.dtsi1398 <&msdc_top CLK_MSDC_TOP_SRC_0P>,