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Searched refs:CLK_IFR_MSDC0_SRC (Results 1 – 5 of 5) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt6765-clk.h220 #define CLK_IFR_MSDC0_SRC 56 macro
H A Dmediatek,mt8365-clk.h196 #define CLK_IFR_MSDC0_SRC 43 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8365.c722 GATE_IFR5(CLK_IFR_MSDC0_SRC, "ifr_msdc0_src", "msdc50_0_sel", 9),
H A Dclk-mt6765.c621 GATE_IFR5(CLK_IFR_MSDC0_SRC, "ifr_msdc0_clk", "msdc50_0_ck", 9),
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8365.dtsi663 <&infracfg CLK_IFR_MSDC0_SRC>;