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Searched refs:CLK_ETHSYS_GP1 (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt2701-eth.c27 GATE_ETH(CLK_ETHSYS_GP1, "gp1_clk", "ethpll_500m_ck", 8),
/linux/include/dt-bindings/clock/
H A Dmt2701-clk.h419 #define CLK_ETHSYS_GP1 4 macro
/linux/arch/arm/boot/dts/mediatek/
H A Dmt2701.dtsi735 <&ethsys CLK_ETHSYS_GP1>,
H A Dmt7623.dtsi969 <&ethsys CLK_ETHSYS_GP1>,