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Searched refs:CLKREQB_PAD_CNTL__CLKREQB_PAD_SN3_MASK (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h370 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN3_MASK 0x00000100L macro
H A Dbif_4_1_sh_mask.h241 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN3_MASK 0x100 macro
H A Dbif_5_0_sh_mask.h279 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN3_MASK 0x100 macro
H A Dbif_5_1_sh_mask.h243 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN3_MASK 0x100 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_sh_mask.h20357 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN3_MASK … macro
H A Dnbio_4_3_0_sh_mask.h17350 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN3_MASK … macro
H A Dnbio_7_0_sh_mask.h117782 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN3_MASK … macro
H A Dnbio_2_3_sh_mask.h1587 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN3_MASK … macro
H A Dnbio_6_1_sh_mask.h17506 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN3_MASK … macro