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Searched refs:CLKREQB_PAD_CNTL__CLKREQB_PAD_SEL_MASK (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h360 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SEL_MASK 0x00000002L macro
H A Dbif_4_1_sh_mask.h229 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SEL_MASK 0x2 macro
H A Dbif_5_0_sh_mask.h267 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SEL_MASK 0x2 macro
H A Dbif_5_1_sh_mask.h231 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SEL_MASK 0x2 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_sh_mask.h20351 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SEL_MASK macro
H A Dnbio_4_3_0_sh_mask.h17344 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SEL_MASK macro
H A Dnbio_7_0_sh_mask.h117776 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SEL_MASK macro
H A Dnbio_2_3_sh_mask.h1581 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SEL_MASK macro
H A Dnbio_6_1_sh_mask.h17500 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SEL_MASK macro