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Searched refs:CLKID_MPLL0 (Results 1 – 11 of 11) sorted by relevance

/linux/include/dt-bindings/clock/
H A Damlogic,s4-pll-clkc.h35 #define CLKID_MPLL0 25 macro
H A Daxg-clkc.h22 #define CLKID_MPLL0 11 macro
H A Dgxbb-clkc.h21 #define CLKID_MPLL0 13 macro
H A Dmeson8b-clkc.h100 #define CLKID_MPLL0 93 macro
H A Dg12a-clkc.h22 #define CLKID_MPLL0 11 macro
/linux/arch/arm/boot/dts/amlogic/
H A Dmeson8b-ec100.dts101 clocks = <&clkc CLKID_MPLL0>,
105 assigned-clocks = <&clkc CLKID_MPLL0>,
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-g12.dtsi78 <&clkc CLKID_MPLL0>,
/linux/drivers/clk/meson/
H A Ds4-pll.c788 [CLKID_MPLL0] = &s4_mpll0.hw,
H A Dmeson8b.c2903 [CLKID_MPLL0] = &meson8b_mpll0.hw,
3107 [CLKID_MPLL0] = &meson8b_mpll0.hw,
3322 [CLKID_MPLL0] = &meson8b_mpll0.hw,
H A Dgxbb.c2862 [CLKID_MPLL0] = &gxbb_mpll0.hw,
3070 [CLKID_MPLL0] = &gxbb_mpll0.hw,
H A Daxg.c1997 [CLKID_MPLL0] = &axg_mpll0.hw,