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Searched refs:CHL_INT2_MSK (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/scsi/hisi_sas/
H A Dhisi_sas_v1_hw.c182 #define CHL_INT2_MSK (PORT_BASE + 0x1c4) macro
802 hisi_sas_phy_write32(hisi_hba, i, CHL_INT2_MSK, 0x12a); in start_phys_v1_hw()
813 hisi_sas_phy_write32(hisi_hba, i, CHL_INT2_MSK, 0x6a); in phys_init_v1_hw()
814 hisi_sas_phy_read32(hisi_hba, i, CHL_INT2_MSK); in phys_init_v1_hw()
1701 hisi_sas_phy_write32(hisi_hba, i, CHL_INT2_MSK, 0x8000012a); in interrupt_openall_v1_hw()
H A Dhisi_sas_v3_hw.c285 #define CHL_INT2_MSK (PORT_BASE + 0x1c8) macro
669 hisi_sas_phy_write32(hisi_hba, i, CHL_INT2_MSK, 0xffffbfe); in interrupt_enable_v3_hw()
1064 u32 irq_msk = hisi_sas_phy_read32(hisi_hba, phy_no, CHL_INT2_MSK); in disable_phy_v3_hw()
1070 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT2_MSK, msk | irq_msk); in disable_phy_v3_hw()
1090 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT2_MSK, irq_msk); in disable_phy_v3_hw()
1889 u32 irq_msk = hisi_sas_phy_read32(hisi_hba, phy_no, CHL_INT2_MSK); in handle_chl_int2_v3_hw()
2735 hisi_sas_phy_write32(hisi_hba, i, CHL_INT2_MSK, 0xffffffff); in interrupt_disable_v3_hw()
3049 HISI_SAS_DEBUGFS_REG(CHL_INT2_MSK),