Searched refs:CHL_INT0_MSK (Results 1 – 1 of 1) sorted by relevance
| /linux/drivers/scsi/hisi_sas/ |
| H A D | hisi_sas_v1_hw.c | 178 #define CHL_INT0_MSK (PORT_BASE + 0x1bc) macro
1389 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT0_MSK, 0x3ce3ee); in int_phyup_v1_hw()
1433 irq_mask_old = hisi_sas_phy_read32(hisi_hba, phy_no, CHL_INT0_MSK); in int_abnormal_v1_hw()
1434 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT0_MSK, 0x3fffff); in int_abnormal_v1_hw()
1470 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT0_MSK, in int_abnormal_v1_hw()
1473 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT0_MSK, in int_abnormal_v1_hw()
1699 hisi_sas_phy_write32(hisi_hba, i, CHL_INT0_MSK, 0x3ce3ee); in interrupt_openall_v1_hw()
1704 hisi_sas_phy_write32(hisi_hba, i, CHL_INT0_MSK, in interrupt_openall_v1_hw()
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