Searched refs:CFG_CLK_DIV (Results 1 – 1 of 1) sorted by relevance
52 #define CFG_CLK_DIV GENMASK(7, 0) macro208 spisg->cfg_bus &= ~CFG_CLK_DIV; in aml_spisg_set_speed()209 spisg->cfg_bus |= cfg_bus & CFG_CLK_DIV; in aml_spisg_set_speed()677 div->shift = __bf_shf(CFG_CLK_DIV); in aml_spisg_clk_init()682 regmap_update_bits(spisg->map, SPISG_REG_CFG_BUS, CFG_CLK_DIV, in aml_spisg_clk_init()683 FIELD_PREP(CFG_CLK_DIV, SPISG_CLK_DIV_MIN - 1)); in aml_spisg_clk_init()