Searched refs:BM_CCSR_PLL1_SW_CLK_SEL (Results 1 – 1 of 1) sorted by relevance
19 #define BM_CCSR_PLL1_SW_CLK_SEL BIT(2) macro129 if (readl_relaxed(ccm_base + CCSR) & BM_CCSR_PLL1_SW_CLK_SEL) { in imx6sl_get_arm_divider_for_wait()