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Searched refs:BIT_4 (Results 1 – 20 of 20) sorted by relevance

/titanic_41/usr/src/uts/common/sys/fibre-channel/fca/qlc/
H A Dql_mbx.h273 #define IDC_FUNC_DST_MASK (BIT_5 | BIT_4)
297 #define IDC_RIT_MASK (BIT_6 | BIT_5 | BIT_4)
323 #define IDC_MS_MASK (BIT_7 | BIT_6 | BIT_5 | BIT_4)
439 #define MBX_4 BIT_4
473 #define FO1_DISABLE_LIP_F7_SW BIT_4
493 #define FO3_SEND_N2N_PRLI BIT_4
529 #define FWATTRIB2_T10_CRC BIT_4
697 #define LINK_CONFIG_DCBX_ENA BIT_4
H A Dql_xioctl.h212 #define FLASH2048 BIT_4
250 #define LED_AMBER_24 BIT_4
302 #define FTYPE_HPPA BIT_4
H A Dql_api.h164 #define BIT_4 0x10 macro
351 #define QL_SNS_CONNECTION BIT_4
517 #define MWB_4096_BYTES (BIT_5 | BIT_4)
519 #define MWB_1024_BYTES BIT_4
803 #define VPO_INITIATOR_MODE_ENABLED BIT_4
1179 #define SRB_WATCHDOG_ENABLED BIT_4 /* Command on watchdog list. */
1308 #define TQF_RSCN_RCVD BIT_4
1394 #define QL_INTR_ADDED BIT_4
1690 #define ABORT_CMDS_LOOP_DOWN_TMO BIT_4
1711 #define SUSPENDED_WAKEUP_FLG BIT_4
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H A Dql_iocb.h321 #define RF_INV_E_COUNT BIT_4 /* Invalid entry count. */
329 #define FCP_CONF_REQ BIT_4
342 #define SF_GOT_STATUS BIT_4
631 #define CF_LUN_RESET BIT_4
696 #define CFO_COND_PLOGI BIT_4
702 #define CFO_IMPLICIT_LOGO BIT_4
707 #define CFO_IMPLICIT_PRLO BIT_4
1212 #define IPCF_LAST_SEQ BIT_4
/titanic_41/usr/src/uts/common/io/comstar/port/qlt/
H A Dqlt_regs.h79 #define PCI_X_XFER_CTRL (BIT_4 | BIT_5)
99 BIT_7 | BIT_6 | BIT_5 | BIT_4 | \
108 #define FW_INTR_STATUS_MASK (BIT_7 | BIT_6 | BIT_5 | BIT_4 | \
H A Dqlt.c1336 DMEM_WR32(qlt, icb+0x5c, BIT_5 | BIT_4); /* fw options 1 */ in qlt_port_online()
1337 DMEM_WR32(qlt, icb+0x64, BIT_20 | BIT_4); /* fw options 3 */ in qlt_port_online()
1347 DMEM_WR32(qlt, icb+0x5c, BIT_11 | BIT_5 | BIT_4 | in qlt_port_online()
1351 BIT_4); in qlt_port_online()
1956 mcp->to_fw[1] = BIT_4; in qlt_force_lip()
3783 req1f = (uint8_t)(req1f | BIT_4); in qlt_send_els_response()
4010 else if (tm & BIT_4) in qlt_handle_atio()
4755 req1f = (uint8_t)(req1f | BIT_4); in qlt_abort_purex()
/titanic_41/usr/src/cmd/picl/plugins/sun4u/snowbird/envmond/
H A Dpiclsensors.h72 #define HIGH_SHUTDOWN_BIT(_X) (BIT_4(_X))
H A Dpiclenvmond.h93 #define BIT_4(_X) ((_X) & 0x10) macro
/titanic_41/usr/src/uts/common/io/skd/
H A Dskd.h70 #define BIT_4 0x00010 macro
91 #define SKD_IOBASE_MAPPED BIT_4
/titanic_41/usr/src/uts/common/sys/
H A Dstmf_defines.h35 #define BIT_4 0x10 macro
/titanic_41/usr/src/uts/common/io/fibre-channel/fca/qlc/
H A Dql_init.c497 nv->firmware_options[0] = BIT_4 | BIT_3 | BIT_2 | BIT_1; in ql_nvram_config()
653 (icb->firmware_options[0] & ~(BIT_5 | BIT_4)); in ql_nvram_config()
655 (icb->firmware_options[1] & ~BIT_4); in ql_nvram_config()
657 icb->add_fw_opt[1] = (uint8_t)(icb->add_fw_opt[1] & ~(BIT_5 | BIT_4)); in ql_nvram_config()
672 (icb->add_fw_opt[1] | BIT_5 | BIT_4); in ql_nvram_config()
683 nv->host_p[0] & BIT_4 ? (ha->cfg_flags |= CFG_DISABLE_RISC_CODE_LOAD) : in ql_nvram_config()
1011 nv->firmware_options_2[1] = BIT_4; in ql_nvram_24xx_config()
1017 nv->host_p[0] = BIT_4 | BIT_1; in ql_nvram_24xx_config()
1025 nv->firmware_options_3[2] = BIT_4; in ql_nvram_24xx_config()
1122 ~(BIT_5 | BIT_4)); in ql_nvram_24xx_config()
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H A Dql_ioctl.c630 nv->firmware_options_2[1] = BIT_4; in ql_set_nvram_adapter_defaults()
636 nv->host_p[0] = BIT_4 | BIT_1; in ql_set_nvram_adapter_defaults()
699 nv->firmware_options[0] = BIT_4 | BIT_3 | BIT_2 | BIT_1; in ql_set_nvram_adapter_defaults()
H A Dql_isr.c1729 } else if (pkt->entry_status & BIT_4) { in ql_error_entry()
1771 if (pkt->entry_status & (BIT_5 + BIT_4 + BIT_3 + BIT_2)) { in ql_error_entry()
H A Dql_mbx.c1776 (pkt->log.io_param[0] & BIT_4 ? 0 : BIT_0); in ql_log_iocb()
2500 BIT_1 : BIT_4); in ql_initiate_lip()
H A Dql_api.c4338 *bptr & (BIT_6 | BIT_5 | BIT_4))) { in ql_port_manage()
4341 (*bptr & ~(BIT_6|BIT_5|BIT_4)); in ql_port_manage()
17452 ddi_put8(els_desc->els_handle, &els_entry->sof_type, (uint8_t)BIT_4); in ql_isp_els_request_ctor()
/titanic_41/usr/src/uts/common/sys/fibre-channel/fca/qlge/
H A Dqlge_hw.h48 #define BIT_4 0x10 macro
411 #define RT_IDX_MCAST_HASH_MATCH BIT_4
524 #define CQ_4_NOT_EMPTY BIT_4
1579 #define IDC_REQ_ALL_DEST_FUNC_MASK BIT_4 /* Mailbox 1 */
2319 #define FLASH2048 BIT_4
H A Dqlge.h238 #define INIT_PCI_CONFIG_SETUP BIT_4
632 #define CFG_HW_UNABLE_PSEUDO_HDR_CKSUM BIT_4
/titanic_41/usr/src/uts/common/io/comstar/port/fcoet/
H A Dfcoet_eth.c588 } else if (tm & BIT_4) { in fcoet_process_unsol_fcp_cmd()
/titanic_41/usr/src/uts/common/io/fibre-channel/fca/fcoei/
H A Dfcoei_eth.c987 (FCOE_B2V_4(src + offset) & BIT_4) ? 1 : 0; in fcoei_fill_els_fpkt_resp()
/titanic_41/usr/src/uts/common/io/fibre-channel/fca/emlxs/
H A Demlxs_fct.c2468 } else if (tm & BIT_4) {