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Searched refs:BIT_1 (Results 1 – 22 of 22) sorted by relevance

/titanic_41/usr/src/uts/common/sys/fibre-channel/fca/qlc/
H A Dql_mbx.h165 #define SE_NIC_1 BIT_1
278 #define IDC_FUNC_SRC_MASK (BIT_3 | BIT_2 | BIT_1 | BIT_0)
290 #define IDC_FUNC_1 BIT_1
293 #define IDC_NIC_FUNC (BIT_1 | BIT_0)
302 #define IDC_RIO_MASK (BIT_3 | BIT_2 | BIT_1 | BIT_0)
330 #define IDC_MM_MASK (BIT_3 | BIT_2 | BIT_1 | BIT_0)
442 #define MBX_1 BIT_1
471 #define FO1_AE_ALL_LIP_RESET BIT_1
487 #define FO2_REV_LOOPBACK BIT_1
494 #define FO3_AE_RND_ERROR BIT_1
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H A Dql_api.h161 #define BIT_1 0x2 macro
348 #define QL_NL_PORT BIT_1
506 #define ISP_FLASH_ENABLE BIT_1 /* Flash BIOS Read/Write enable */
544 #define NV_SELECT BIT_1
806 #define VPO_PREVIOUSLY_ASSIGNED_ID BIT_1
1176 #define SRB_ISP_COMPLETED BIT_1 /* ISP finished with command. */
1305 #define TQF_QUEUE_SUSPENDED BIT_1 /* Queue suspended. */
1367 #define QL_DUMP_VALID BIT_1
1391 #define QL_REGS_MAPPED BIT_1
1687 #define QL_OPENED BIT_1
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H A Dql_xioctl.h209 #define FLASH512 BIT_1
299 #define FTYPE_BIOS BIT_1
423 #define QL_MGMT_SERVER_LOGIN BIT_1
H A Dql_iocb.h85 #define CF_HTAG BIT_1
182 #define CF_RD BIT_1
324 #define RF_BUSY BIT_1 /* Busy */
332 #define FCP_SNS_LEN_VALID BIT_1
345 #define SF_GOT_TARGET BIT_1
358 #define SF_HEAD_OF_Q BIT_1
634 #define CF_TARGET_RESET BIT_1
1207 #define IPCF_TERMINATE_EXCH BIT_1
1424 #define VMF_FORCE_UPDATE_FW BIT_1
H A Dql_init.h879 #define LNF_VPD_DATA BIT_1 /* get vpd data (24xx only) */
/titanic_41/usr/src/uts/common/io/comstar/port/qlt/
H A Dqlt_regs.h81 #define FLASH_WRITE_ENABLE BIT_1
100 BIT_3 | BIT_2 | BIT_1)
109 BIT_3 | BIT_2 | BIT_1 | BIT_0)
H A Dqlt.c1057 mcp->to_fw_mask |= BIT_1 | BIT_8; in qlt_info()
1058 mcp->from_fw_mask |= BIT_1 | BIT_2; in qlt_info()
1348 BIT_2 | BIT_1 | BIT_0); in qlt_port_online()
1403 BIT_1; in qlt_port_online()
1424 mcp->from_fw_mask = BIT_0 | BIT_1; in qlt_port_online()
1438 mcp->from_fw_mask = BIT_11 | BIT_10 | BIT_3 | BIT_2 | BIT_1 | in qlt_port_online()
1517 mcp->from_fw_mask |= BIT_0 | BIT_1 | BIT_2 | BIT_3 | BIT_6 | BIT_7; in qlt_get_link_info()
1570 mcp->to_fw_mask |= BIT_0 | BIT_1 | BIT_9 | BIT_10; in qlt_get_link_info()
1958 mcp->to_fw_mask |= BIT_1 | BIT_3; in qlt_force_lip()
3080 mcp->from_fw_mask |= BIT_1 | BIT_2; in qlt_portid_to_handle()
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/titanic_41/usr/src/uts/common/io/skd/
H A Dskd.h67 #define BIT_1 0x00002 macro
89 #define SKD_SOFT_STATE_ALLOCED BIT_1
110 #define LOW_POWER_LEVEL (BIT_1 | BIT_0)
/titanic_41/usr/src/cmd/picl/plugins/sun4u/snowbird/envmond/
H A Dpiclsensors.h69 #define LOW_SHUTDOWN_BIT(_X) (BIT_1(_X))
H A Dpiclenvmond.h90 #define BIT_1(_X) ((_X) & 0x02) macro
/titanic_41/usr/src/uts/common/sys/fibre-channel/fca/qlge/
H A Dqlge.h235 #define INIT_REGS_SETUP BIT_1
314 #define NEED_MPI_RESET BIT_1 /* need MPI RISC reset */
629 #define CFG_JUMBLE_PACKET BIT_1
692 #define LOW_POWER_LEVEL (BIT_1 | BIT_0)
H A Dqlge_hw.h45 #define BIT_1 0x2 macro
408 #define RT_IDX_MCAST BIT_1
521 #define CQ_1_NOT_EMPTY BIT_1
1003 #define ADAPTER_ERROR BIT_1
1437 #define DUMP_REQUEST_CORE BIT_1
1582 #define IDC_REQ_DEST_FUNC_1_MASK BIT_1
2316 #define FLASH512 BIT_1
2449 #define FLT_ATTR_NEED_FW_RESTART BIT_1
/titanic_41/usr/src/uts/common/sys/
H A Dstmf_defines.h32 #define BIT_1 0x2 macro
/titanic_41/usr/src/uts/common/io/fibre-channel/fca/qlc/
H A Dql_init.c497 nv->firmware_options[0] = BIT_4 | BIT_3 | BIT_2 | BIT_1; in ql_nvram_config()
564 nv->host_p[0] = BIT_1; in ql_nvram_config()
627 (icb->firmware_options[0] | BIT_6 | BIT_1); in ql_nvram_config()
648 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); in ql_nvram_config()
658 icb->special_options[0] = (uint8_t)(icb->special_options[0] | BIT_1); in ql_nvram_config()
688 nv->host_p[1] & BIT_1 ? (ha->cfg_flags |= CFG_ENABLE_LIP_RESET) : in ql_nvram_config()
1008 nv->firmware_options_1[0] = BIT_2 | BIT_1; in ql_nvram_24xx_config()
1017 nv->host_p[0] = BIT_4 | BIT_1; in ql_nvram_24xx_config()
1115 (icb->firmware_options_1[0] | BIT_1); in ql_nvram_24xx_config()
1119 (icb->firmware_options_3[0] | BIT_1); in ql_nvram_24xx_config()
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H A Dql_ioctl.c627 nv->firmware_options_1[0] = BIT_2 | BIT_1; in ql_set_nvram_adapter_defaults()
636 nv->host_p[0] = BIT_4 | BIT_1; in ql_set_nvram_adapter_defaults()
699 nv->firmware_options[0] = BIT_4 | BIT_3 | BIT_2 | BIT_1; in ql_set_nvram_adapter_defaults()
714 nv->host_p[0] = BIT_1; in ql_set_nvram_adapter_defaults()
H A Dql_mbx.c1779 (mr->mb[1] | BIT_1); in ql_log_iocb()
2500 BIT_1 : BIT_4); in ql_initiate_lip()
2547 mcp->mb[1] = BIT_1; in ql_full_login_lip()
2590 BIT_1 : BIT_6); in ql_lip_reset()
4091 mcp->mb[1] = BIT_1; in ql_set_xmit_parms()
H A Dql_isr.c1735 } else if (pkt->entry_status & BIT_1) { in ql_error_entry()
1774 } else if (pkt->entry_status & BIT_1) /* FULL flag */ { in ql_error_entry()
/titanic_41/usr/src/uts/common/io/fibre-channel/fca/fcoei/
H A Dfcoei_eth.c993 (FCOE_B2V_4(src + offset) & BIT_1) ? 1 : 0; in fcoei_fill_els_fpkt_resp()
1094 (FCOE_B2V_1(src + offset) & BIT_1) ? 1 : 0; in fcoei_fill_fcp_resp()
/titanic_41/usr/src/uts/common/io/comstar/port/fcoet/
H A Dfcoet_eth.c584 if (tm & BIT_1) { in fcoet_process_unsol_fcp_cmd()
H A Dfcoet_fc.c792 ffr->ffr_flags[0] |= BIT_1; in fcoet_send_status()
/titanic_41/usr/src/uts/common/io/fibre-channel/fca/qlge/
H A Dqlge_flash.c1123 if (reg_status & BIT_1) in ql_flash_write_enable()
/titanic_41/usr/src/uts/common/io/fibre-channel/fca/emlxs/
H A Demlxs_fct.c2464 if (tm & BIT_1) {