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Searched refs:BIT2 (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/scsi/
H A Ddc395x.h74 #define BIT2 0x00000004 macro
81 #define FORMATING_MEDIA BIT2
87 #define ASPI_SUPPORT BIT2
123 #define RESET_DONE BIT2
131 #define OVER_RUN BIT2
141 #define RESET_DEV0 BIT2
167 #define WIDE_NEGO_ENABLE BIT2
594 #define RST_SCSI_BUS BIT2
/linux/drivers/video/fbdev/via/
H A Ddvi.c335 BIT0 + BIT1 + BIT2); in dvi_patch_skew_dvp0()
338 BIT0 + BIT1 + BIT2); in dvi_patch_skew_dvp0()
345 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp0()
370 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp_low()
377 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp_low()
H A Dshare.h16 #define BIT2 0x04 macro
H A Dhw.c949 viafb_write_reg_mask(CR33, VIACR, 0x06, BIT0 + BIT1 + BIT2); in load_fix_bit_crtc_reg()
2058 p_gfx_dpa_setting->DVP0ClockDri_S, BIT2); in viafb_set_dpa_gfx()
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Dpwrseq.h26 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0 \
130 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0 \
199 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0 \
205 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2 \
386 PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0 \
523 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2 \
/linux/drivers/net/wireless/realtek/rtlwifi/btcoexist/
H A Dhalbt_precomp.h33 #define BIT2 0x00000004 macro
H A Dhalbtc8821a2ant.h13 #define BT_INFO_8821A_2ANT_B_INQ_PAGE BIT2
H A Dhalbtc8192e2ant.h12 #define BT_INFO_8192E_2ANT_B_INQ_PAGE BIT2
H A Dhalbtc8821a1ant.h13 #define BT_INFO_8821A_1ANT_B_INQ_PAGE BIT2
H A Dhalbtc8723b2ant.h15 #define BT_INFO_8723B_2ANT_B_INQ_PAGE BIT2
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192d/
H A Dreg.h505 #define WOW_MAGIC BIT2 /* Magic packet */