Searched refs:AMDGPU_HW_IP_GFX (Results 1 – 9 of 9) sorted by relevance
500 case AMDGPU_HW_IP_GFX: in amdgpu_userq_get_doorbell_index()741 ((queue->queue_type != AMDGPU_HW_IP_GFX) && in amdgpu_userq_create()809 if (args->in.ip_type != AMDGPU_HW_IP_GFX && in amdgpu_userq_input_args_validate()818 (args->in.ip_type != AMDGPU_HW_IP_GFX) && in amdgpu_userq_input_args_validate()1434 if (!(ip_mask & ((1 << AMDGPU_HW_IP_GFX) | (1 << AMDGPU_HW_IP_COMPUTE)))) in amdgpu_userq_stop_sched_for_enforce_isolation()1444 if (((queue->queue_type == AMDGPU_HW_IP_GFX) || in amdgpu_userq_stop_sched_for_enforce_isolation()1467 if (!(ip_mask & ((1 << AMDGPU_HW_IP_GFX) | (1 << AMDGPU_HW_IP_COMPUTE)))) in amdgpu_userq_start_sched_for_enforce_isolation()1478 if (((queue->queue_type == AMDGPU_HW_IP_GFX) || in amdgpu_userq_start_sched_for_enforce_isolation()
36 [AMDGPU_HW_IP_GFX] = 1,149 case AMDGPU_HW_IP_GFX: in amdgpu_ctx_get_hw_prio()809 if (hw_ip == AMDGPU_HW_IP_COMPUTE || hw_ip == AMDGPU_HW_IP_GFX) { in amdgpu_ctx_set_entity_priority()
390 } else if (queue->queue_type == AMDGPU_HW_IP_GFX) { in mes_userq_mqd_create()
394 mqd_size = adev->mqds[AMDGPU_HW_IP_GFX].mqd_size; in amdgpu_gfx_mqd_reset_restore()414 u32 gfx_mqd_size = max(adev->mqds[AMDGPU_HW_IP_GFX].mqd_size, mqd_size); in amdgpu_gfx_mqd_sw_init()
1443 adev->userq_funcs[AMDGPU_HW_IP_GFX] = &userq_mes_funcs; in gfx_v12_0_sw_init()3699 if (adev->userq_funcs[AMDGPU_HW_IP_GFX]) { in gfx_v12_0_set_userq_eop_interrupts()5537 adev->mqds[AMDGPU_HW_IP_GFX].mqd_size = in gfx_v12_0_set_mqd_funcs()5539 adev->mqds[AMDGPU_HW_IP_GFX].init_mqd = in gfx_v12_0_set_mqd_funcs()
1658 adev->userq_funcs[AMDGPU_HW_IP_GFX] = &userq_mes_funcs; in gfx_v11_0_sw_init()1670 adev->userq_funcs[AMDGPU_HW_IP_GFX] = &userq_mes_funcs; in gfx_v11_0_sw_init()4860 if (adev->userq_funcs[AMDGPU_HW_IP_GFX]) { in gfx_v11_0_set_userq_eop_interrupts()7282 adev->mqds[AMDGPU_HW_IP_GFX].mqd_size = in gfx_v11_0_set_mqd_funcs()7284 adev->mqds[AMDGPU_HW_IP_GFX].init_mqd = in gfx_v11_0_set_mqd_funcs()
382 if (chunk_ib->ip_type == AMDGPU_HW_IP_GFX && in amdgpu_cs_p2_ib()
10058 adev->mqds[AMDGPU_HW_IP_GFX].mqd_size = in gfx_v10_0_set_mqd_funcs()10060 adev->mqds[AMDGPU_HW_IP_GFX].init_mqd = in gfx_v10_0_set_mqd_funcs()
935 #define AMDGPU_HW_IP_GFX 0 macro