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Searched refs:AMDGPU_GPU_PAGE_SIZE (Results 1 – 25 of 28) sorted by relevance

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/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_gart.c324 t = offset / AMDGPU_GPU_PAGE_SIZE; in amdgpu_gart_unbind()
333 page_base += AMDGPU_GPU_PAGE_SIZE; in amdgpu_gart_unbind()
365 t = offset / AMDGPU_GPU_PAGE_SIZE; in amdgpu_gart_map()
371 page_base += AMDGPU_GPU_PAGE_SIZE; in amdgpu_gart_map()
410 page_base += AMDGPU_GPU_PAGE_SIZE; in amdgpu_gart_map_vram_range()
446 t = offset / AMDGPU_GPU_PAGE_SIZE; in amdgpu_gart_map_gfx9_mqd()
455 page_base += AMDGPU_GPU_PAGE_SIZE; in amdgpu_gart_map_gfx9_mqd()
524 if (PAGE_SIZE < AMDGPU_GPU_PAGE_SIZE) { in amdgpu_gart_init()
533 adev->gart.num_gpu_pages = adev->gmc.gart_size / AMDGPU_GPU_PAGE_SIZE; in amdgpu_gart_init()
H A Damdgpu_gart.h35 #define AMDGPU_GPU_PAGE_SIZE 4096 macro
36 #define AMDGPU_GPU_PAGE_MASK (AMDGPU_GPU_PAGE_SIZE - 1)
40 #define AMDGPU_GPU_PAGES_IN_CPU_PAGE (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE)
H A Damdgpu_vm.c1193 (last - start + 1) * AMDGPU_GPU_PAGE_SIZE, &cursor); in amdgpu_vm_update_range()
1242 amdgpu_res_next(&cursor, num_entries * AMDGPU_GPU_PAGE_SIZE); in amdgpu_vm_update_range()
1889 saddr /= AMDGPU_GPU_PAGE_SIZE; in amdgpu_vm_bo_map()
1890 eaddr = saddr + (size - 1) / AMDGPU_GPU_PAGE_SIZE; in amdgpu_vm_bo_map()
1958 saddr /= AMDGPU_GPU_PAGE_SIZE; in amdgpu_vm_bo_replace_map()
1959 eaddr = saddr + (size - 1) / AMDGPU_GPU_PAGE_SIZE; in amdgpu_vm_bo_replace_map()
1993 saddr /= AMDGPU_GPU_PAGE_SIZE; in amdgpu_vm_bo_unmap()
2059 saddr /= AMDGPU_GPU_PAGE_SIZE; in amdgpu_vm_bo_clear_mappings()
2060 eaddr = saddr + (size - 1) / AMDGPU_GPU_PAGE_SIZE; in amdgpu_vm_bo_clear_mappings()
3055 addr /= AMDGPU_GPU_PAGE_SIZE; in amdgpu_vm_handle_fault()
H A Damdgpu_gem.c873 vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE; in amdgpu_gem_va_ioctl()
1137 vm_entries[num_mappings].addr = mapping->start * AMDGPU_GPU_PAGE_SIZE; in amdgpu_gem_op_ioctl()
1138 vm_entries[num_mappings].size = (mapping->last - mapping->start + 1) * AMDGPU_GPU_PAGE_SIZE; in amdgpu_gem_op_ioctl()
1147 vm_entries[num_mappings].addr = mapping->start * AMDGPU_GPU_PAGE_SIZE; in amdgpu_gem_op_ioctl()
1148 vm_entries[num_mappings].size = (mapping->last - mapping->start + 1) * AMDGPU_GPU_PAGE_SIZE; in amdgpu_gem_op_ioctl()
H A Damdgpu_dev_coredump.c260 AMDGPU_GMC_HOLE_MASK) / AMDGPU_GPU_PAGE_SIZE; in amdgpu_devcoredump_print_ibs()
284 va_start / AMDGPU_GPU_PAGE_SIZE); in amdgpu_devcoredump_print_ibs()
289 offset = va_start - mapping->start * AMDGPU_GPU_PAGE_SIZE; in amdgpu_devcoredump_print_ibs()
H A Damdgpu_vce.c483 r = amdgpu_ib_get(ring->adev, NULL, AMDGPU_GPU_PAGE_SIZE * 2, in amdgpu_vce_get_create_msg()
703 (mapping->last + 1) * AMDGPU_GPU_PAGE_SIZE) { in amdgpu_vce_cs_reloc()
709 addr -= mapping->start * AMDGPU_GPU_PAGE_SIZE; in amdgpu_vce_cs_reloc()
H A Dvce_v1_0.c552 u64 num_pages = ALIGN(bo_size, AMDGPU_GPU_PAGE_SIZE) / AMDGPU_GPU_PAGE_SIZE; in vce_v1_0_ensure_vcpu_bo_32bit_addr()
H A Damdgpu_gtt_mgr.c230 alignment = 32 * 1024 / AMDGPU_GPU_PAGE_SIZE; in amdgpu_gtt_mgr_alloc_entries()
H A Dmes_v11_0.c75 #define MES11_HW_RESOURCE_1_SIZE (128 * AMDGPU_GPU_PAGE_SIZE)
1050 mes->resource_1_gpu_addr[0] + AMDGPU_GPU_PAGE_SIZE; in mes_v11_0_set_hw_resources_1()
1478 ((order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1) << 8)); in mes_v11_0_mqd_init()
1763 bo_size = AMDGPU_GPU_PAGE_SIZE; in mes_v11_0_sw_init()
H A Damdgpu_virt.c471 AMDGPU_GPU_PAGE_SIZE); in amdgpu_virt_ras_reserve_bps()
475 AMDGPU_GPU_PAGE_SIZE, in amdgpu_virt_ras_reserve_bps()
710 (uint64_t)(adev->mes.resource_1_gpu_addr[0] + AMDGPU_GPU_PAGE_SIZE); in amdgpu_virt_write_vf2pf_data()
712 adev->mes.resource_1[0]->tbo.base.size - AMDGPU_GPU_PAGE_SIZE; in amdgpu_virt_write_vf2pf_data()
H A Damdgpu_uvd.c909 end = end * AMDGPU_GPU_PAGE_SIZE + start; in amdgpu_uvd_cs_pass2()
911 addr -= mapping->start * AMDGPU_GPU_PAGE_SIZE; in amdgpu_uvd_cs_pass2()
H A Damdgpu_cs.c1058 (m->last + 1) * AMDGPU_GPU_PAGE_SIZE) { in amdgpu_cs_patch_ibs()
1068 kptr += va_start - (m->start * AMDGPU_GPU_PAGE_SIZE); in amdgpu_cs_patch_ibs()
1807 addr /= AMDGPU_GPU_PAGE_SIZE; in amdgpu_cs_find_mapping()
H A Damdgpu_ttm.c1958 * PAGE_SIZE is <= AMDGPU_GPU_PAGE_SIZE (4K). The BO is created as a regular
1975 /* Skip if HW doesn't expose remap, or if PAGE_SIZE > AMDGPU_GPU_PAGE_SIZE (4K). */ in amdgpu_ttm_alloc_mmio_remap_bo()
1976 if (!adev->rmmio_remap.bus_addr || PAGE_SIZE > AMDGPU_GPU_PAGE_SIZE) in amdgpu_ttm_alloc_mmio_remap_bo()
1986 bp.size = AMDGPU_GPU_PAGE_SIZE; in amdgpu_ttm_alloc_mmio_remap_bo()
1987 bp.byte_align = AMDGPU_GPU_PAGE_SIZE; in amdgpu_ttm_alloc_mmio_remap_bo()
H A Dmes_v12_0.c1547 ((order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1) << 8)); in mes_v12_0_mqd_init()
1852 r = amdgpu_bo_create_kernel(adev, AMDGPU_GPU_PAGE_SIZE, PAGE_SIZE, in mes_v12_0_sw_init()
H A Dvcn_v4_0.c1843 start = map->start * AMDGPU_GPU_PAGE_SIZE; in vcn_v4_0_dec_msg()
1844 end = (map->last + 1) * AMDGPU_GPU_PAGE_SIZE; in vcn_v4_0_dec_msg()
H A Dvcn_v3_0.c1927 start = map->start * AMDGPU_GPU_PAGE_SIZE; in vcn_v3_0_dec_msg()
1928 end = (map->last + 1) * AMDGPU_GPU_PAGE_SIZE; in vcn_v3_0_dec_msg()
H A Damdgpu_userq.c848 if (args->in.queue_size < AMDGPU_GPU_PAGE_SIZE) { in amdgpu_userq_input_args_validate()
849 drm_file_err(filp, "Queue size smaller than AMDGPU_GPU_PAGE_SIZE\n"); in amdgpu_userq_input_args_validate()
H A Dmes_v12_1.c1323 ((order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1) << 8)); in mes_v12_1_mqd_init()
H A Damdgpu_psp.c4773 AMDGPU_GPU_PAGE_SIZE, in amdgpu_psp_vbflash_read()
4910 AMDGPU_GPU_PAGE_SIZE, in psp_read_spirom_debugfs_open()
H A Damdgpu_device.c998 return amdgpu_bo_create_kernel(adev, AMDGPU_GPU_PAGE_SIZE, PAGE_SIZE, in amdgpu_device_mem_scratch_init()
H A Dgfx_v9_4_3.c1841 ((order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1) << 8)); in gfx_v9_4_3_xcc_mqd_init()
H A Dgfx_v12_1.c2510 (order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1)); in gfx_v12_1_compute_mqd_init()
H A Dgfx_v12_0.c3248 (order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1)); in gfx_v12_0_compute_mqd_init()
H A Dgfx_v8_0.c4468 (order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1)); in gfx_v8_0_mqd_init()
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_mqd_manager_v9.c53 return ALIGN(ALIGN(q->ctl_stack_size, AMDGPU_GPU_PAGE_SIZE) + in mqd_stride_v9()
54 ALIGN(sizeof(struct v9_mqd), AMDGPU_GPU_PAGE_SIZE), PAGE_SIZE); in mqd_stride_v9()
147 (ALIGN(ALIGN(q->ctl_stack_size, AMDGPU_GPU_PAGE_SIZE) + in allocate_mqd()
148 ALIGN(sizeof(struct v9_mqd), AMDGPU_GPU_PAGE_SIZE), PAGE_SIZE)) * in allocate_mqd()
373 void *mqd_ctl_stack = (void *)((uintptr_t)mqd + AMDGPU_GPU_PAGE_SIZE); in get_wave_state()
420 void *ctl_stack = (void *)((uintptr_t)mqd + AMDGPU_GPU_PAGE_SIZE); in checkpoint_mqd()
471 ctl_stack = (void *)((uintptr_t)*mqd + AMDGPU_GPU_PAGE_SIZE); in restore_mqd()
1046 AMDGPU_GPU_PAGE_SIZE); in mqd_manager_init_v9()

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