Searched refs:AMDGPU_GMC_HOLE_MASK (Results 1 – 8 of 8) sorted by relevance
46 #define AMDGPU_GMC_HOLE_MASK 0x0000ffffffffffffULL macro
76 wptr &= AMDGPU_GMC_HOLE_MASK; in mes_userq_create_wptr_mapping()
379 addr &= AMDGPU_GMC_HOLE_MASK; in amdgpu_userq_fence_read_wptr()
1442 uint64_t csa_addr = amdgpu_csa_vaddr(adev) & AMDGPU_GMC_HOLE_MASK; in amdgpu_driver_open_kms()1515 uint64_t csa_addr = amdgpu_csa_vaddr(adev) & AMDGPU_GMC_HOLE_MASK; in amdgpu_driver_postclose_kms()
178 user_addr = (addr & AMDGPU_GMC_HOLE_MASK) >> AMDGPU_GPU_PAGE_SHIFT; in amdgpu_userq_input_va_validate()
1038 va_start = ib->gpu_addr & AMDGPU_GMC_HOLE_MASK; in amdgpu_cs_patch_ibs()
1835 addr &= AMDGPU_GMC_HOLE_MASK; in vcn_v4_0_dec_msg()
1918 addr &= AMDGPU_GMC_HOLE_MASK; in vcn_v3_0_dec_msg()